diff options
| author |   Zhen Lei <thunder.leizhen@huawei.com> | 2020-10-12 21:17:31 +0800 |
|---|---|---|
| committer |   Wei Xu <xuwei5@hisilicon.com> | 2020-11-24 20:06:17 +0800 |
| commit | 8c563f55ee1d0241b834dd4b43be11cf7a47732b (patch) | |
| tree | 1ff837b7550679a4e33384ac1f9e600db6846730 /arch/arm64/boot/dts/hisilicon/hi3670.dtsi | |
| parent | arm64: dts: hisilicon: separate each group of data in the property "reg" (diff) | |
| download | linux-dev-8c563f55ee1d0241b834dd4b43be11cf7a47732b.tar.xz linux-dev-8c563f55ee1d0241b834dd4b43be11cf7a47732b.zip | |
arm64: dts: hisilicon: write the values of property-units into a uint32 array
Use <> to separate the values of property-units will be treated as
multiple arrays. The errors similar to the following will be reported by
property-units.yaml.
ufs@ff3c0000: freq-table-hz: [[0, 0], [0, 0]] is too long
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Diffstat (limited to 'arch/arm64/boot/dts/hisilicon/hi3670.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/hisilicon/hi3670.dtsi | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi index 2dcffa3ed218..668977d1acba 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi @@ -667,7 +667,8 @@ clocks = <&crg_ctrl HI3670_CLK_GATE_UFSIO_REF>, <&crg_ctrl HI3670_CLK_GATE_UFS_SUBSYS>; clock-names = "ref_clk", "phy_clk"; - freq-table-hz = <0 0>, <0 0>; + freq-table-hz = <0 0 + 0 0>; /* offset: 0x84; bit: 12 */ resets = <&crg_rst 0x84 12>; reset-names = "rst"; |