Merge tag 'mvebu-dt64-5.1-1' of git://git.infradead.org/linux-mvebu into arm/dt

mvebu dt64 for 5.1 (part 1)

 - Interrupt support to Armada 7K/8K thermal nodes
 - Armada 37xx related patches allowing to enable suspend to RAM
   (USB2, USB3, PCIe, SATA, DSA)
 - uDPU board support (Armada-3720 based):single-port FTTdp
    distribution point unit
 - Fixes for EspressoBin Ethernet support when using U-Boot mainline
 - cleanup for partitions under flashes nodes

* tag 'mvebu-dt64-5.1-1' of git://git.infradead.org/linux-mvebu:
  arm64: dts: marvell: armada-37xx: link USB hosts with their PHYs
  arm64: dts: marvell: armada-3720-espressobin: declare SATA PHY property
  arm64: dts: marvell: armada-3720-espressobin: declare PCIe PHY
  arm64: dts: marvell: armada-37xx: declare the COMPHY node
  arm64: dts: marvell: Remove unnecessary #address-cells/#size-cells under flashes
  arm64: dts: armada-3720-espressobin: Set mv88e6341 cpu port as RGMII-ID
  arm64: dts: armada-3720-espressobin: Configure RGMII and SMI pins
  arm64: dts: marvell: Add device tree for uDPU board
  arm64: dts: marvell: armada-3720-espressobin: declare PCIe warm reset pin
  arm64: dts: marvell: armada-37xx: declare PCIe reset pin
  arm64: dts: marvell: armada-37xx: declare USB2 UTMI PHYs
  arm64: dts: marvell: armada-37xx: fix USB2 memory region
  arm64: dts: marvell: armada-37xx: declare SATA clock
  arm64: dts: marvell: armada-37xx: fix SATA node scope
  arm64: dts: marvell: add interrupt support to cp110 thermal node
  arm64: dts: marvell: add interrupt support to ap806 thermal node

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

1 files changed, 15 insertions, 3 deletions

diff --git a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
index 7f799cb5668e..91dad7e4ee59 100644
--- a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
@@ -283,6 +283,8 @@
 				ap_thermal: thermal-sensor@80 {
 					compatible = "marvell,armada-ap806-thermal";
 					reg = <0x80 0x10>;
+					interrupt-parent = <&sei>;
+					interrupts = <18>;
 					#thermal-sensor-cells = <1>;
 				};
 			};
@@ -293,16 +295,26 @@
 	 * The thermal IP features one internal sensor plus, if applicable, one
 	 * remote channel wired to one sensor per CPU.
 	 *
+	 * Only one thermal zone per AP/CP may trigger interrupts at a time, the
+	 * first one that will have a critical trip point will be chosen.
+	 *
 	 * The cooling maps are always empty as there are no cooling devices.
 	 */
 	thermal-zones {
 		ap_thermal_ic: ap-thermal-ic {
-			polling-delay-passive = <1000>;
-			polling-delay = <1000>;
+			polling-delay-passive = <0>; /* Interrupt driven */
+			polling-delay = <0>; /* Interrupt driven */
 
 			thermal-sensors = <&ap_thermal 0>;
 
-			trips {	};
+			trips {
+				ap_crit: ap-crit {
+					temperature = <100000>; /* mC degrees */
+					hysteresis = <2000>; /* mC degrees */
+					type = "critical";
+				};
+			};
+
 			cooling-maps { };
 		};