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| author |   Sean Wang <sean.wang@mediatek.com> | 2018-02-18 03:54:38 +0800 |
|---|---|---|
| committer |   Matthias Brugger <matthias.bgg@gmail.com> | 2018-03-11 20:19:20 +0100 |
| commit | 925bd27f772d61b39bc1adde4f76062f29c7ed56 (patch) | |
| tree | c8b404e0c7f06729e75e758d082d9346fdb4bf5c /arch/arm64/boot/dts/mediatek/mt7622.dtsi | |
| parent | arm64: dts: mt7622: add clock controller device nodes (diff) | |
| download | linux-dev-925bd27f772d61b39bc1adde4f76062f29c7ed56.tar.xz linux-dev-925bd27f772d61b39bc1adde4f76062f29c7ed56.zip | |
arm64: dts: mt7622: add power domain controller device nodes
add power domain controller nodes
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Cc: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Diffstat (limited to 'arch/arm64/boot/dts/mediatek/mt7622.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/mediatek/mt7622.dtsi | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi b/arch/arm64/boot/dts/mediatek/mt7622.dtsi index 73e5d628a8c8..81207e652d59 100644 --- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi @@ -9,6 +9,7 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/mt7622-clk.h> +#include <dt-bindings/power/mt7622-power.h> #include <dt-bindings/reset/mt7622-reset.h> / { @@ -109,6 +110,20 @@ #reset-cells = <1>; }; + scpsys: scpsys@10006000 { + compatible = "mediatek,mt7622-scpsys", + "syscon"; + #power-domain-cells = <1>; + reg = <0 0x10006000 0 0x1000>; + interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_LOW>, + <GIC_SPI 166 IRQ_TYPE_LEVEL_LOW>, + <GIC_SPI 167 IRQ_TYPE_LEVEL_LOW>, + <GIC_SPI 168 IRQ_TYPE_LEVEL_LOW>; + infracfg = <&infracfg>; + clocks = <&topckgen CLK_TOP_HIF_SEL>; + clock-names = "hif_sel"; + }; + sysirq: interrupt-controller@10200620 { compatible = "mediatek,mt7622-sysirq", "mediatek,mt6577-sysirq"; |