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| author |   Joseph Lo <josephl@nvidia.com> | 2019-01-04 11:06:58 +0800 |
|---|---|---|
| committer |   Thierry Reding <treding@nvidia.com> | 2019-02-07 19:03:09 +0100 |
| commit | a5e98b0b371c11bb49be0b661a03a04a5c3b1f44 (patch) | |
| tree | 7bbbab069cedbcfe19fd6e6c3ba819a1b360e440 /arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi | |
| parent | arm64: tegra: Add CPU clocks on Tegra210 (diff) | |
| download | linux-dev-a5e98b0b371c11bb49be0b661a03a04a5c3b1f44.tar.xz linux-dev-a5e98b0b371c11bb49be0b661a03a04a5c3b1f44.zip | |
arm64: tegra: Add pinmux for PWM-based DFLL support on P2597
Add pinmux for PWM-based DFLL support.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi index f4bb48d87df7..8780b5b3d2b9 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi @@ -1278,6 +1278,20 @@ nvidia,open-drain = <TEGRA_PIN_DISABLE>; }; }; + + dvfs_pwm_active_state: dvfs_pwm_active { + dvfs_pwm_pbb1 { + nvidia,pins = "dvfs_pwm_pbb1"; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + }; + }; + + dvfs_pwm_inactive_state: dvfs_pwm_inactive { + dvfs_pwm_pbb1 { + nvidia,pins = "dvfs_pwm_pbb1"; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + }; + }; }; pwm@7000a000 { |