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author | Thierry Reding <treding@nvidia.com> | 2021-12-06 17:58:55 +0100 |
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committer | Thierry Reding <treding@nvidia.com> | 2021-12-16 16:51:01 +0100 |
commit | 4cc3e3e164c02c6f2fce38f2098a1fe1256ea58d (patch) | |
tree | 9e26e340f253328e644806083aa3a470165bd614 /arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts | |
parent | arm64: tegra: Add ISO SMMU controller for Tegra194 (diff) | |
download | linux-dev-4cc3e3e164c02c6f2fce38f2098a1fe1256ea58d.tar.xz linux-dev-4cc3e3e164c02c6f2fce38f2098a1fe1256ea58d.zip |
arm64: tegra: Rename top-level clocks
Clocks defined at the top level in device tree are no longer part of a
simple bus and therefore don't have a reg property. Nodes without a reg
property shouldn't have a unit-address either, so drop the unit address
from the node names. To ensure nodes aren't duplicated (in which case
they would end up merged in the final DTB), append the name of the clock
to the node name.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts')
-rw-r--r-- | arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts b/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts index 030f264eccd5..cbd8cda48f37 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts +++ b/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts @@ -1645,7 +1645,7 @@ }; }; - clk32k_in: clock@0 { + clk32k_in: clock-32k { compatible = "fixed-clock"; clock-frequency = <32768>; #clock-cells = <0>; |