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| author |   Thierry Reding <treding@nvidia.com> | 2020-07-15 11:50:17 +0200 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2020-07-15 11:56:30 +0200 |
| commit | 97ace1b41e4a4aa3ece129af93d3ee41860ac763 (patch) | |
| tree | 804dd5662e3d1579242dd749051d26450d91a690 /arch/arm64/boot/dts/nvidia/tegra210.dtsi | |
| parent | arm64: tegra: Fix compatible string for DPAUX on Tegra210 (diff) | |
| download | linux-dev-97ace1b41e4a4aa3ece129af93d3ee41860ac763.tar.xz linux-dev-97ace1b41e4a4aa3ece129af93d3ee41860ac763.zip | |
arm64: tegra: Add clocks and resets for ISP on Tegra210
The ISP blocks take a clock and a reset as inputs, so add those to the
device tree nodes.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm64/boot/dts/nvidia/tegra210.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/nvidia/tegra210.dtsi | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi index 87fe03648182..2fc4c1fb6149 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi @@ -361,6 +361,9 @@ compatible = "nvidia,tegra210-isp"; reg = <0x0 0x54600000 0x0 0x00040000>; interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&tegra_car TEGRA210_CLK_ISPA>; + resets = <&tegra_car 23>; + reset-names = "isp"; status = "disabled"; }; @@ -368,6 +371,9 @@ compatible = "nvidia,tegra210-isp"; reg = <0x0 0x54680000 0x0 0x00040000>; interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&tegra_car TEGRA210_CLK_ISPB>; + resets = <&tegra_car 3>; + reset-names = "isp"; status = "disabled"; }; |