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| author |   Thierry Reding <treding@nvidia.com> | 2020-06-12 10:52:50 +0200 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2020-07-15 11:07:38 +0200 |
| commit | d19532e6d328c4db50bb3c738c626ea1f5f0db6f (patch) | |
| tree | 363ba0445b28120dedef4e3dd7dc2947ce2e9e6a /arch/arm64/boot/dts/nvidia/tegra210.dtsi | |
| parent | arm64: tegra: Rename cbb@0 to bus@0 on Tegra194 (diff) | |
| download | linux-dev-d19532e6d328c4db50bb3c738c626ea1f5f0db6f.tar.xz linux-dev-d19532e6d328c4db50bb3c738c626ea1f5f0db6f.zip | |
arm64: tegra: Fix order of XUSB controller clocks
This is purely to make the json-schema validation tools happy because
they cannot deal with string arrays that may be in arbitrary order.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm64/boot/dts/nvidia/tegra210.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/nvidia/tegra210.dtsi | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi index c0efa199ac70..f4e0cc289b02 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi @@ -997,8 +997,8 @@ <&tegra_car TEGRA210_CLK_XUSB_HOST_SRC>, <&tegra_car TEGRA210_CLK_XUSB_FALCON_SRC>, <&tegra_car TEGRA210_CLK_XUSB_SS>, - <&tegra_car TEGRA210_CLK_XUSB_SS_DIV2>, <&tegra_car TEGRA210_CLK_XUSB_SS_SRC>, + <&tegra_car TEGRA210_CLK_XUSB_SS_DIV2>, <&tegra_car TEGRA210_CLK_XUSB_HS_SRC>, <&tegra_car TEGRA210_CLK_XUSB_FS_SRC>, <&tegra_car TEGRA210_CLK_PLL_U_480M>, @@ -1006,7 +1006,7 @@ <&tegra_car TEGRA210_CLK_PLL_E>; clock-names = "xusb_host", "xusb_host_src", "xusb_falcon_src", "xusb_ss", - "xusb_ss_div2", "xusb_ss_src", + "xusb_ss_src", "xusb_ss_div2", "xusb_hs_src", "xusb_fs_src", "pll_u_480m", "clk_m", "pll_e"; resets = <&tegra_car 89>, <&tegra_car 156>, |