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authorKonrad Dybcio <konrad.dybcio@somainline.org>2021-02-28 14:08:19 +0100
committerBjorn Andersson <bjorn.andersson@linaro.org>2021-05-25 22:40:32 -0500
commit35a4a8b6e9b133cf3a7d059ad4cf0e24cb4bd029 (patch)
treececd5d73e40da9fbee82b3afadb411cc881a5afe /arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
parentarm64: dts: qcom: Add board support for HK10 (diff)
downloadlinux-dev-35a4a8b6e9b133cf3a7d059ad4cf0e24cb4bd029.tar.xz
linux-dev-35a4a8b6e9b133cf3a7d059ad4cf0e24cb4bd029.zip
arm64: dts: qcom: msm8996: Sanitize pins
In order to prepare for feature development, the DTs have to be workable with.. To achieve that: - Rename msmgpio to tlmm (consistency with newer DTs) - Rid msm8996-pins.dtsi and add the contents to msm8996.dtsi - Modernize the pin nodes, make them more concise - Add generic pin configuration for some hardware - Fix up some names in preparation for BLSP/UART name cleaning.. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210228130831.203765-1-konrad.dybcio@somainline.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Diffstat (limited to 'arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi')
-rw-r--r--arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi22
1 files changed, 11 insertions, 11 deletions
diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
index 409a5dec2615..4212f5c6e8b6 100644
--- a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
@@ -188,16 +188,16 @@
label = "LS-UART1";
status = "okay";
pinctrl-names = "default", "sleep";
- pinctrl-0 = <&blsp2_uart1_2pins_default>;
- pinctrl-1 = <&blsp2_uart1_2pins_sleep>;
+ pinctrl-0 = <&blsp2_uart2_2pins_default>;
+ pinctrl-1 = <&blsp2_uart2_2pins_sleep>;
};
&blsp2_uart2 {
label = "LS-UART0";
status = "disabled";
pinctrl-names = "default", "sleep";
- pinctrl-0 = <&blsp2_uart2_4pins_default>;
- pinctrl-1 = <&blsp2_uart2_4pins_sleep>;
+ pinctrl-0 = <&blsp2_uart3_4pins_default>;
+ pinctrl-1 = <&blsp2_uart3_4pins_sleep>;
};
&camss {
@@ -249,7 +249,7 @@
vdd-gfx-supply = <&vdd_gfx>;
};
-&msmgpio {
+&tlmm {
gpio-line-names =
"[SPI0_DOUT]", /* GPIO_0, BLSP1_SPI_MOSI, LSEC pin 14 */
"[SPI0_DIN]", /* GPIO_1, BLSP1_SPI_MISO, LSEC pin 10 */
@@ -509,20 +509,20 @@
&pcie0 {
status = "okay";
- perst-gpio = <&msmgpio 35 GPIO_ACTIVE_LOW>;
+ perst-gpio = <&tlmm 35 GPIO_ACTIVE_LOW>;
vddpe-3v3-supply = <&wlan_en>;
vdda-supply = <&vreg_l28a_0p925>;
};
&pcie1 {
status = "okay";
- perst-gpio = <&msmgpio 130 GPIO_ACTIVE_LOW>;
+ perst-gpio = <&tlmm 130 GPIO_ACTIVE_LOW>;
vdda-supply = <&vreg_l28a_0p925>;
};
&pcie2 {
status = "okay";
- perst-gpio = <&msmgpio 114 GPIO_ACTIVE_LOW>;
+ perst-gpio = <&tlmm 114 GPIO_ACTIVE_LOW>;
vdda-supply = <&vreg_l28a_0p925>;
};
@@ -933,9 +933,9 @@
&sdhc2 {
/* External SD card */
pinctrl-names = "default", "sleep";
- pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>;
- pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;
- cd-gpios = <&msmgpio 38 0x1>;
+ pinctrl-0 = <&sdc2_state_on &sdc2_cd_on>;
+ pinctrl-1 = <&sdc2_state_off &sdc2_cd_off>;
+ cd-gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
vmmc-supply = <&vreg_l21a_2p95>;
vqmmc-supply = <&vreg_l13a_2p95>;
status = "okay";