aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm64/boot/dts/qcom/msm8916-mtp.dtsi
diff options
context:
space:
mode:
authorKumar Gala <galak@codeaurora.org>2015-02-27 15:48:59 -0600
committerOlof Johansson <olof@lixom.net>2015-04-03 13:32:16 -0700
commit57f0a7eae6bd5f5811f070f63ffa482c7d6faad7 (patch)
tree6381bec63611dcac6d3928de2d5df96959731f3d /arch/arm64/boot/dts/qcom/msm8916-mtp.dtsi
parentarm64: dts: sprd: adding coresight entries to Spreadtrum SC9836 (diff)
downloadlinux-dev-57f0a7eae6bd5f5811f070f63ffa482c7d6faad7.tar.xz
linux-dev-57f0a7eae6bd5f5811f070f63ffa482c7d6faad7.zip
arm64: dts: Add Qualcomm MSM8916 SoC and evaluation board dts
Add initial device tree support for Qualcomm MSM8916 SoC and MTP8916 evaluation board. At the current time we only boot up a single processor. Signed-off-by: Kumar Gala <galak@codeaurora.org> Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm64/boot/dts/qcom/msm8916-mtp.dtsi')
-rw-r--r--arch/arm64/boot/dts/qcom/msm8916-mtp.dtsi33
1 files changed, 33 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/msm8916-mtp.dtsi b/arch/arm64/boot/dts/qcom/msm8916-mtp.dtsi
new file mode 100644
index 000000000000..bea871b0df13
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/msm8916-mtp.dtsi
@@ -0,0 +1,33 @@
+/*
+ * Copyright (c) 2014-2015, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include "msm8916.dtsi"
+
+/ {
+ aliases {
+ serial0 = &blsp1_uart2;
+ };
+
+ chosen {
+ stdout-path = "serial0";
+ };
+
+ soc {
+ serial@78b0000 {
+ status = "okay";
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&blsp1_uart2_default>;
+ pinctrl-1 = <&blsp1_uart2_sleep>;
+ };
+ };
+};