diff options
| author |   Rob Clark <robdclark@gmail.com> | 2017-06-12 08:43:15 -0400 |
|---|---|---|
| committer |   Andy Gross <andy.gross@linaro.org> | 2017-08-15 14:07:51 -0500 |
| commit | 61b83be9117c13b03147362bc3926b13de09fa9b (patch) | |
| tree | 086fa854d9b82201b957f786fec527a2c952cb68 /arch/arm64/boot/dts/qcom/msm8916.dtsi | |
| parent | arm64: dts: qcom: msm8996: Specify smd-edge for ADSP (diff) | |
| download | linux-dev-61b83be9117c13b03147362bc3926b13de09fa9b.tar.xz linux-dev-61b83be9117c13b03147362bc3926b13de09fa9b.zip | |
arm64: dts: qcom: msm8916: Add gpu support
This patch adds the Qualcomm Adreno GPU node that exists in the
MSM8916.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Diffstat (limited to 'arch/arm64/boot/dts/qcom/msm8916.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/qcom/msm8916.dtsi | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index 3d43f4dc1b39..51c0ffc20a92 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -204,6 +204,17 @@ }; + gpu_opp_table: opp_table { + compatible = "operating-points-v2"; + + opp-400000000 { + opp-hz = /bits/ 64 <400000000>; + }; + opp-19200000 { + opp-hz = /bits/ 64 <19200000>; + }; + }; + timer { compatible = "arm,armv8-timer"; interrupts = <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, @@ -694,6 +705,30 @@ #thermal-sensor-cells = <1>; }; + gpu@1c00000 { + compatible = "qcom,adreno-306.0", "qcom,adreno"; + reg = <0x01c00000 0x20000>; + reg-names = "kgsl_3d0_reg_memory"; + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "kgsl_3d0_irq"; + clock-names = + "core", + "iface", + "mem", + "mem_iface", + "alt_mem_iface", + "gfx3d"; + clocks = + <&gcc GCC_OXILI_GFX3D_CLK>, + <&gcc GCC_OXILI_AHB_CLK>, + <&gcc GCC_OXILI_GMEM_CLK>, + <&gcc GCC_BIMC_GFX_CLK>, + <&gcc GCC_BIMC_GPU_CLK>, + <&gcc GFX3D_CLK_SRC>; + power-domains = <&gcc OXILI_GDSC>; + operating-points-v2 = <&gpu_opp_table>; + }; + mdss: mdss@1a00000 { compatible = "qcom,mdss"; reg = <0x1a00000 0x1000>, |