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author | 2016-08-01 18:47:01 -0400 | |
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committer | 2016-08-01 18:47:01 -0400 | |
commit | ed780686de61ab27e65f1cfedeccd7b45667bd70 (patch) | |
tree | ac9d0047df09f963b50bc72944fdc43076a39e37 /arch/arm64/boot/dts/qcom/msm8916.dtsi | |
parent | Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc (diff) | |
parent | Merge tag 'tegra-for-4.8-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/late (diff) | |
download | linux-dev-ed780686de61ab27e65f1cfedeccd7b45667bd70.tar.xz linux-dev-ed780686de61ab27e65f1cfedeccd7b45667bd70.zip |
Merge tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull 64-bit ARM DT updates from Olof Johansson:
"Just as the 32-bit contents, the 64-bit device tree branch also
contains a number of additions this release cycle.
New platforms:
- LG LG1313
- Mediatek MT6755
- Renesas r8a7796
- Broadcom 2837
Other platforms with larger updates are:
- Nvidia X1 platforms (USB 3.0, regulators, display subsystem)
- Mediatek MT8173 (display subsystem added)
- Rockchip RK3399 (a lot of new peripherals)
- ARM Juno reference implementation (SCPI power domains, coresight,
thermal)"
* tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (118 commits)
arm64: tegra: Enable HDMI on Jetson TX1
arm64: tegra: Add sor1_src clock
arm64: tegra: Add XUSB powergates on Tegra210
arm64: tegra: Add DPAUX pinctrl bindings
arm64: tegra: Add ACONNECT bus node for Tegra210
arm64: tegra: Add audio powergate node for Tegra210
arm64: tegra: Add regulators for Tegra210 Smaug
arm64: tegra: Correct Tegra210 XUSB mailbox interrupt
arm64: tegra: Enable XUSB controller on Jetson TX1
arm64: tegra: Enable debug serial on Jetson TX1
arm64: tegra: Add Tegra210 XUSB controller
arm64: tegra: Add Tegra210 XUSB pad controller
arm64: tegra: Add DSI panel on Jetson TX1
arm64: tegra: p2597: Add SDMMC power supplies
arm64: tegra: Add PMIC support on Jetson TX1
Revert "ARM64: DTS: meson-gxbb: switch ethernet to real clock"
arm64: dts: hi6220: Add pl031 RTC support
arm64: dts: r8a7796/salvator-x: Enable watchdog timer
arm64: dts: r8a7796: Add RWDT node
arm64: dts: r8a7796: Use SYSC "always-on" PM Domain
...
Diffstat (limited to 'arch/arm64/boot/dts/qcom/msm8916.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/qcom/msm8916.dtsi | 78 |
1 files changed, 75 insertions, 3 deletions
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index 96812007850e..11bdc24cfc74 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -42,13 +42,48 @@ #size-cells = <2>; ranges; - reserve_aligned@86000000 { - reg = <0x0 0x86000000 0x0 0x0300000>; + tz-apps@86000000 { + reg = <0x0 0x86000000 0x0 0x300000>; no-map; }; smem_mem: smem_region@86300000 { - reg = <0x0 0x86300000 0x0 0x0100000>; + reg = <0x0 0x86300000 0x0 0x100000>; + no-map; + }; + + hypervisor@86400000 { + reg = <0x0 0x86400000 0x0 0x100000>; + no-map; + }; + + tz@86500000 { + reg = <0x0 0x86500000 0x0 0x180000>; + no-map; + }; + + reserved@8668000 { + reg = <0x0 0x86680000 0x0 0x80000>; + no-map; + }; + + rmtfs@86700000 { + reg = <0x0 0x86700000 0x0 0xe0000>; + no-map; + }; + + rfsa@867e00000 { + reg = <0x0 0x867e0000 0x0 0x20000>; + no-map; + }; + + mpss@86800000 { + reg = <0x0 0x86800000 0x0 0x2b00000>; + no-map; + }; + + wcnss@89300000 { + reg = <0x0 0x89300000 0x0 0x600000>; no-map; }; }; @@ -62,6 +97,8 @@ compatible = "arm,cortex-a53", "arm,armv8"; reg = <0x0>; next-level-cache = <&L2_0>; + enable-method = "psci"; + cpu-idle-states = <&CPU_SPC>; }; CPU1: cpu@1 { @@ -69,6 +106,8 @@ compatible = "arm,cortex-a53", "arm,armv8"; reg = <0x1>; next-level-cache = <&L2_0>; + enable-method = "psci"; + cpu-idle-states = <&CPU_SPC>; }; CPU2: cpu@2 { @@ -76,6 +115,8 @@ compatible = "arm,cortex-a53", "arm,armv8"; reg = <0x2>; next-level-cache = <&L2_0>; + enable-method = "psci"; + cpu-idle-states = <&CPU_SPC>; }; CPU3: cpu@3 { @@ -83,12 +124,35 @@ compatible = "arm,cortex-a53", "arm,armv8"; reg = <0x3>; next-level-cache = <&L2_0>; + enable-method = "psci"; + cpu-idle-states = <&CPU_SPC>; }; L2_0: l2-cache { compatible = "cache"; cache-level = <2>; }; + + idle-states { + CPU_SPC: spc { + compatible = "arm,idle-state"; + arm,psci-suspend-param = <0x40000002>; + entry-latency-us = <130>; + exit-latency-us = <150>; + min-residency-us = <2000>; + local-timer-stop; + }; + }; + }; + + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + }; + + pmu { + compatible = "arm,armv8-pmuv3"; + interrupts = <GIC_PPI 7 GIC_CPU_MASK_SIMPLE(4)>; }; timer { @@ -122,6 +186,14 @@ hwlocks = <&tcsr_mutex 3>; }; + firmware { + scm { + compatible = "qcom,scm"; + clocks = <&gcc GCC_CRYPTO_CLK>, <&gcc GCC_CRYPTO_AXI_CLK>, <&gcc GCC_CRYPTO_AHB_CLK>; + clock-names = "core", "bus", "iface"; + }; + }; + soc: soc { #address-cells = <1>; #size-cells = <1>; |