diff options
| author |   Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | 2022-06-17 13:36:52 +0300 |
|---|---|---|
| committer |   Bjorn Andersson <bjorn.andersson@linaro.org> | 2022-07-02 22:17:11 -0500 |
| commit | 2752bb7d9b58accbaa15bcfc50de0e41e84990d5 (patch) | |
| tree | d9f60952a5e5c06c1621e64c9641674e15c6c7d2 /arch/arm64/boot/dts/qcom/msm8996.dtsi | |
| parent | arm64: dts: qcom: add mdp_clk clock to the MDSS device (diff) | |
| download | linux-dev-2752bb7d9b58accbaa15bcfc50de0e41e84990d5.tar.xz linux-dev-2752bb7d9b58accbaa15bcfc50de0e41e84990d5.zip | |
arm64: dts: qcom: msm8996: add second DSI interface
Add device nodes for the DSI1, second DSI interface found on
MSM8996/APQ8096 platforms. For example on db820c it is routed to the
secondary HS expansion connector.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220617103652.606250-1-dmitry.baryshkov@linaro.org
Diffstat (limited to 'arch/arm64/boot/dts/qcom/msm8996.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/qcom/msm8996.dtsi | 73 |
1 files changed, 73 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index ebafe6702dcb..25d6b26fab60 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -848,6 +848,13 @@ remote-endpoint = <&dsi0_in>; }; }; + + port@2 { + reg = <2>; + mdp5_intf2_out: endpoint { + remote-endpoint = <&dsi1_in>; + }; + }; }; }; @@ -917,6 +924,72 @@ status = "disabled"; }; + dsi1: dsi@996000 { + compatible = "qcom,mdss-dsi-ctrl"; + reg = <0x00996000 0x400>; + reg-names = "dsi_ctrl"; + + interrupt-parent = <&mdss>; + interrupts = <4>; + + clocks = <&mmcc MDSS_MDP_CLK>, + <&mmcc MDSS_BYTE1_CLK>, + <&mmcc MDSS_AHB_CLK>, + <&mmcc MDSS_AXI_CLK>, + <&mmcc MMSS_MISC_AHB_CLK>, + <&mmcc MDSS_PCLK1_CLK>, + <&mmcc MDSS_ESC1_CLK>; + clock-names = "mdp_core", + "byte", + "iface", + "bus", + "core_mmss", + "pixel", + "core"; + + phys = <&dsi1_phy>; + phy-names = "dsi"; + status = "disabled"; + + #address-cells = <1>; + #size-cells = <0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dsi1_in: endpoint { + remote-endpoint = <&mdp5_intf2_out>; + }; + }; + + port@1 { + reg = <1>; + dsi1_out: endpoint { + }; + }; + }; + }; + + dsi1_phy: dsi-phy@996400 { + compatible = "qcom,dsi-phy-14nm"; + reg = <0x00996400 0x100>, + <0x00996500 0x300>, + <0x00996800 0x188>; + reg-names = "dsi_phy", + "dsi_phy_lane", + "dsi_pll"; + + #clock-cells = <1>; + #phy-cells = <0>; + + clocks = <&mmcc MDSS_AHB_CLK>, <&rpmcc RPM_SMD_BB_CLK1>; + clock-names = "iface", "ref"; + status = "disabled"; + }; + hdmi: hdmi-tx@9a0000 { compatible = "qcom,hdmi-tx-8996"; reg = <0x009a0000 0x50c>, |