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| author |   Dmitry Torokhov <dmitry.torokhov@gmail.com> | 2019-07-20 07:07:56 +0300 |
|---|---|---|
| committer | Dmitry Torokhov <dmitry.torokhov@gmail.com> | 2019-07-20 07:07:56 +0300 |
| commit | c39f2d9db0fd81ea20bb5cce9b3f082ca63753e2 (patch) | |
| tree | 8e80ed5601b4fb8880a2ca8e08802bc8b1f850bd /arch/arm64/boot/dts/renesas/r8a774a1.dtsi | |
| parent | Merge branch 'next' into for-linus (diff) | |
| parent | Input: alps - fix a mismatch between a condition check and its comment (diff) | |
| download | linux-dev-c39f2d9db0fd81ea20bb5cce9b3f082ca63753e2.tar.xz linux-dev-c39f2d9db0fd81ea20bb5cce9b3f082ca63753e2.zip | |
Merge branch 'next' into for-linus
Prepare second round of input updates for 5.3 merge window.
Diffstat (limited to 'arch/arm64/boot/dts/renesas/r8a774a1.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi index ef3cff2dd1b6..de282c4794ed 100644 --- a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi @@ -879,8 +879,10 @@ "renesas,rcar-gen3-can"; reg = <0 0xe6c30000 0 0x1000>; interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 916>, <&can_clk>; - clock-names = "clkp1", "can_clk"; + clocks = <&cpg CPG_MOD 916>, + <&cpg CPG_CORE R8A774A1_CLK_CANFD>, + <&can_clk>; + clock-names = "clkp1", "clkp2", "can_clk"; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; resets = <&cpg 916>; status = "disabled"; @@ -891,8 +893,10 @@ "renesas,rcar-gen3-can"; reg = <0 0xe6c38000 0 0x1000>; interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 915>, <&can_clk>; - clock-names = "clkp1", "can_clk"; + clocks = <&cpg CPG_MOD 915>, + <&cpg CPG_CORE R8A774A1_CLK_CANFD>, + <&can_clk>; + clock-names = "clkp1", "clkp2", "can_clk"; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; resets = <&cpg 915>; status = "disabled"; |