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authorBiju Das <biju.das@bp.renesas.com>2019-01-16 18:37:49 +0000
committerSimon Horman <horms+renesas@verge.net.au>2019-01-23 09:50:43 +0100
commita102b93eafef0994f1a96e9683d1e3d692a6bb48 (patch)
treeef3afb7eb8583a5475e1e87b60ee54af27e62ba5 /arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts
parentarm64: dts: renesas: r8a774c0-cat874: Add pincontrol support to scif2 (diff)
downloadlinux-dev-a102b93eafef0994f1a96e9683d1e3d692a6bb48.tar.xz
linux-dev-a102b93eafef0994f1a96e9683d1e3d692a6bb48.zip
arm64: dts: renesas: r8a774c0-cat874: Add uSD support
This patch adds uSD card support. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts')
-rw-r--r--arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts50
1 files changed, 50 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts b/arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts
index c545ce5320c7..477a56b3273c 100644
--- a/arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts
+++ b/arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts
@@ -7,6 +7,7 @@
/dts-v1/;
#include "r8a774c0.dtsi"
+#include <dt-bindings/gpio/gpio.h>
/ {
model = "Silicon Linux RZ/G2E 96board platform (CAT874)";
@@ -26,6 +27,29 @@
/* first 128MB is reserved for secure area. */
reg = <0x0 0x48000000 0x0 0x78000000>;
};
+
+ vcc_sdhi0: regulator-vcc-sdhi0 {
+ compatible = "regulator-fixed";
+
+ regulator-name = "SDHI0 Vcc";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ vccq_sdhi0: regulator-vccq-sdhi0 {
+ compatible = "regulator-gpio";
+
+ regulator-name = "SDHI0 VccQ";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+
+ gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
+ gpios-states = <1>;
+ states = <3300000 1
+ 1800000 0>;
+ };
};
&extal_clk {
@@ -37,6 +61,18 @@
groups = "scif2_data_a";
function = "scif2";
};
+
+ sdhi0_pins: sd0 {
+ groups = "sdhi0_data4", "sdhi0_ctrl";
+ function = "sdhi0";
+ power-source = <3300>;
+ };
+
+ sdhi0_pins_uhs: sd0_uhs {
+ groups = "sdhi0_data4", "sdhi0_ctrl";
+ function = "sdhi0";
+ power-source = <1800>;
+ };
};
&scif2 {
@@ -45,3 +81,17 @@
status = "okay";
};
+
+&sdhi0 {
+ pinctrl-0 = <&sdhi0_pins>;
+ pinctrl-1 = <&sdhi0_pins_uhs>;
+ pinctrl-names = "default", "state_uhs";
+
+ vmmc-supply = <&vcc_sdhi0>;
+ vqmmc-supply = <&vccq_sdhi0>;
+ cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
+ bus-width = <4>;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ status = "okay";
+};