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| author |   Biju Das <biju.das@bp.renesas.com> | 2019-09-13 09:50:08 +0100 |
|---|---|---|
| committer |   Geert Uytterhoeven <geert+renesas@glider.be> | 2019-10-01 09:50:57 +0200 |
| commit | 652fd0f44e98a7fa87be9e97115749e103ccf703 (patch) | |
| tree | 9e28584508657eb91fec18dbe769aaeb662f037c /arch/arm64/boot/dts/renesas/r8a774c0.dtsi | |
| parent | arm64: dts: renesas: r8a774c0: Create thermal zone to support IPA (diff) | |
| download | linux-dev-652fd0f44e98a7fa87be9e97115749e103ccf703.tar.xz linux-dev-652fd0f44e98a7fa87be9e97115749e103ccf703.zip | |
arm64: dts: renesas: r8a774c0: Add dynamic power coefficient
Describe the dynamic power coefficient of A53 CPUs.
Based on work by Gaku Inami <gaku.inami.xw@bp.renesas.com> and others.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Link: https://lore.kernel.org/r/1568364608-46548-2-git-send-email-biju.das@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'arch/arm64/boot/dts/renesas/r8a774c0.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/renesas/r8a774c0.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi index 764df4c0ea05..c7bdc3606323 100644 --- a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi @@ -77,6 +77,7 @@ power-domains = <&sysc R8A774C0_PD_CA53_CPU0>; next-level-cache = <&L2_CA53>; enable-method = "psci"; + dynamic-power-coefficient = <277>; clocks = <&cpg CPG_CORE R8A774C0_CLK_Z2>; operating-points-v2 = <&cluster1_opp>; }; |