aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb.dts
diff options
context:
space:
mode:
authorDaniel Vetter <daniel.vetter@ffwll.ch>2017-07-26 13:23:10 +0200
committerDaniel Vetter <daniel.vetter@ffwll.ch>2017-07-26 13:43:33 +0200
commitaf055598542670c8533a58582813b1419949cae0 (patch)
tree901fa1bf635d5c1e91d08f9f4c2e4943516dbb71 /arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb.dts
parentdrm/syncobj: Fix kerneldoc (diff)
parentMerge tag 'drm-intel-next-2017-07-17' of git://anongit.freedesktop.org/git/drm-intel into drm-next (diff)
downloadlinux-dev-af055598542670c8533a58582813b1419949cae0.tar.xz
linux-dev-af055598542670c8533a58582813b1419949cae0.zip
Merge airlied/drm-next into drm-misc-next
I need this to be able to apply the deferred fbdev setup patches, I need the relevant prep work that landed through the drm-intel tree. Also squash in conflict fixup from Laurent Pinchart. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb.dts')
-rw-r--r--arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb.dts42
1 files changed, 42 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb.dts b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb.dts
new file mode 100644
index 000000000000..95fe207cb6a3
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb.dts
@@ -0,0 +1,42 @@
+/*
+ * Device Tree Source for the H3ULCB (R-Car Starter Kit Premier) board
+ *
+ * Copyright (C) 2016 Renesas Electronics Corp.
+ * Copyright (C) 2016 Cogent Embedded, Inc.
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+#define CPG_AUDIO_CLK_I R8A7795_CLK_S0D4
+
+/dts-v1/;
+#include "r8a7795-es1.dtsi"
+#include "ulcb.dtsi"
+
+/ {
+ model = "Renesas H3ULCB board based on r8a7795 ES1.x";
+ compatible = "renesas,h3ulcb", "renesas,r8a7795";
+
+ memory@48000000 {
+ device_type = "memory";
+ /* first 128MB is reserved for secure area. */
+ reg = <0x0 0x48000000 0x0 0x38000000>;
+ };
+
+ memory@500000000 {
+ device_type = "memory";
+ reg = <0x5 0x00000000 0x0 0x40000000>;
+ };
+
+ memory@600000000 {
+ device_type = "memory";
+ reg = <0x6 0x00000000 0x0 0x40000000>;
+ };
+
+ memory@700000000 {
+ device_type = "memory";
+ reg = <0x7 0x00000000 0x0 0x40000000>;
+ };
+};