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| author |   Gilad Ben-Yossef <gilad@benyossef.com> | 2018-05-24 15:19:10 +0100 |
|---|---|---|
| committer |   Simon Horman <horms+renesas@verge.net.au> | 2018-06-25 15:30:18 +0200 |
| commit | 0f6d237cafda2e06b289eab1fa2addf09e666a07 (patch) | |
| tree | d8c0f060d7a7b318745059dbe521afb15de9b5c2 /arch/arm64/boot/dts/renesas/r8a7795.dtsi | |
| parent | arm64: dts: renesas: r8a77965: Add Watchdog Timer controller node using RCLK Watchdog Timer (diff) | |
| download | linux-dev-0f6d237cafda2e06b289eab1fa2addf09e666a07.tar.xz linux-dev-0f6d237cafda2e06b289eab1fa2addf09e666a07.zip | |
arm64: dts: renesas: r8a7795: add ccree to device tree
Add bindings for CryptoCell instance in the SoC.
Signed-off-by: Gilad Ben-Yossef <gilad@benyossef.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm64/boot/dts/renesas/r8a7795.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/renesas/r8a7795.dtsi | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index d842940b2f43..3ac75dbf2d93 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi @@ -528,6 +528,15 @@ status = "disabled"; }; + arm_cc630p: crypto@e6601000 { + compatible = "arm,cryptocell-630p-ree"; + interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; + reg = <0x0 0xe6601000 0 0x1000>; + clocks = <&cpg CPG_MOD 229>; + resets = <&cpg 229>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; + }; + i2c3: i2c@e66d0000 { #address-cells = <1>; #size-cells = <0>; |