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| author |   Michael Riesch <michael.riesch@wolfvision.net> | 2022-04-22 09:28:37 +0200 |
|---|---|---|
| committer |   Heiko Stuebner <heiko@sntech.de> | 2022-06-07 11:14:33 +0200 |
| commit | 4bcee17c7f28e2c63e9e13bb037101510777e7a9 (patch) | |
| tree | be58499d474ea5ddee75b9de5a29c63c97bd54dd /arch/arm64/boot | |
| parent | arm64: dts: rockchip: enable vop2 and hdmi tx on quartz64a (diff) | |
| download | linux-dev-4bcee17c7f28e2c63e9e13bb037101510777e7a9.tar.xz linux-dev-4bcee17c7f28e2c63e9e13bb037101510777e7a9.zip | |
arm64: dts: rockchip: enable vop2 and hdmi tx on rock-3a
Enable the RK356x Video Output Processor (VOP) 2 on the Radxa
ROCK3 Model A.
Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
Reported-by: kernel test robot <lkp@intel.com>
Link: https://lore.kernel.org/r/20220310210352.451136-4-michael.riesch@wolfvision.net
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Link: https://lore.kernel.org/r/20220422072841.2206452-21-s.hauer@pengutronix.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm64/boot')
| -rw-r--r-- | arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts b/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts index 0813c0c5abde..da2ef705ce29 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts +++ b/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts @@ -4,6 +4,7 @@ #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/leds/common.h> #include <dt-bindings/pinctrl/rockchip.h> +#include <dt-bindings/soc/rockchip,vop2.h> #include "rk3568.dtsi" / { @@ -20,6 +21,17 @@ stdout-path = "serial2:1500000n8"; }; + hdmi-con { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_con_in: endpoint { + remote-endpoint = <&hdmi_out_con>; + }; + }; + }; + leds { compatible = "gpio-leds"; @@ -166,6 +178,24 @@ status = "okay"; }; +&hdmi { + avdd-0v9-supply = <&vdda0v9_image>; + avdd-1v8-supply = <&vcca1v8_image>; + status = "okay"; +}; + +&hdmi_in { + hdmi_in_vp0: endpoint { + remote-endpoint = <&vp0_out_hdmi>; + }; +}; + +&hdmi_out { + hdmi_out_con: endpoint { + remote-endpoint = <&hdmi_con_in>; + }; +}; + &i2c0 { status = "okay"; @@ -560,3 +590,20 @@ phy-supply = <&vcc5v0_usb_host>; status = "okay"; }; + +&vop { + assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; + assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; + status = "okay"; +}; + +&vop_mmu { + status = "okay"; +}; + +&vp0 { + vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { + reg = <ROCKCHIP_VOP2_EP_HDMI0>; + remote-endpoint = <&hdmi_in_vp0>; + }; +}; |