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authorGeert Uytterhoeven <geert+renesas@glider.be>2018-05-03 14:30:49 +0200
committerSimon Horman <horms+renesas@verge.net.au>2018-05-16 10:46:17 +0200
commit786f3cc022f73973eda247a0f80f73971ebda764 (patch)
tree3cf9ae7e152af3971593db1dc110b29f2ae27918 /arch/arm64/boot
parentarm64: dts: renesas: r8a77965: Correct whitespace (diff)
downloadlinux-dev-786f3cc022f73973eda247a0f80f73971ebda764.tar.xz
linux-dev-786f3cc022f73973eda247a0f80f73971ebda764.zip
arm64: dts: renesas: ulcb: Add BD9571 PMIC
Add a device node for the ROHM BD9571MWV PMIC. This was based on the example in the DT binding documentation, but using IRQ0 instead of a GPIO interrupt, as that matches the schematics, and because INTC-EX is a simpler block. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm64/boot')
-rw-r--r--arch/arm64/boot/dts/renesas/ulcb.dtsi29
1 files changed, 29 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/ulcb.dtsi b/arch/arm64/boot/dts/renesas/ulcb.dtsi
index 93402783d52f..ee4249287fbd 100644
--- a/arch/arm64/boot/dts/renesas/ulcb.dtsi
+++ b/arch/arm64/boot/dts/renesas/ulcb.dtsi
@@ -243,6 +243,30 @@
&i2c_dvfs {
status = "okay";
+
+ pmic: pmic@30 {
+ pinctrl-0 = <&irq0_pins>;
+ pinctrl-names = "default";
+
+ compatible = "rohm,bd9571mwv";
+ reg = <0x30>;
+ interrupt-parent = <&intc_ex>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ regulators {
+ dvfs: dvfs {
+ regulator-name = "dvfs";
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <1030000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+ };
+ };
};
&ohci1 {
@@ -276,6 +300,11 @@
function = "i2c2";
};
+ irq0_pins: irq0 {
+ groups = "intc_ex_irq0";
+ function = "intc_ex";
+ };
+
scif2_pins: scif2 {
groups = "scif2_data_a";
function = "scif2";