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| author |   Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | 2022-05-02 22:26:04 +0300 |
|---|---|---|
| committer |   Bjorn Andersson <bjorn.andersson@linaro.org> | 2022-06-25 15:13:56 -0500 |
| commit | fc8b0b9b630df6de7415f527fe27c0c441b5dc70 (patch) | |
| tree | 3cb467c0863e38acc73424f3a5d57acb1a8f20e3 /arch/arm64/boot | |
| parent | arm64: dts: qcom: msm8994: Fix CPU6/7 reg values (diff) | |
| download | linux-dev-fc8b0b9b630df6de7415f527fe27c0c441b5dc70.tar.xz linux-dev-fc8b0b9b630df6de7415f527fe27c0c441b5dc70.zip | |
arm64: dts: qcom: sm8450 add ITS device tree node
Add device tree node corresponding to the ITS part of GICv3.
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220502192604.272686-1-dmitry.baryshkov@linaro.org
Diffstat (limited to 'arch/arm64/boot')
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sm8450.dtsi | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi index b2accf996094..b87756bf1ce4 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -2853,6 +2853,16 @@ reg = <0x0 0x17100000 0x0 0x10000>, /* GICD */ <0x0 0x17180000 0x0 0x200000>; /* GICR * 8 */ interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + gic_its: msi-controller@17140000 { + compatible = "arm,gic-v3-its"; + reg = <0x0 0x17140000 0x0 0x20000>; + msi-controller; + #msi-cells = <1>; + }; }; timer@17420000 { |