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authorMarc Zyngier <marc.zyngier@arm.com>2016-06-27 18:11:43 +0100
committerMarc Zyngier <marc.zyngier@arm.com>2016-09-12 19:46:19 +0100
commit04c8b0f82c7d5a9a1c296eef914ae3bb820bcb85 (patch)
tree0f0d6f5a723d59c97f0c28674c0b486ead7a544e /arch/arm64/include/asm/arch_gicv3.h
parentLinux 4.8-rc6 (diff)
downloadlinux-dev-04c8b0f82c7d5a9a1c296eef914ae3bb820bcb85.tar.xz
linux-dev-04c8b0f82c7d5a9a1c296eef914ae3bb820bcb85.zip
irqchip/gic: Make locking a BL_SWITCHER only feature
The BL switcher code manipulates the logical/physical CPU mapping, forcing a lock to be taken on the IPI path. With an IPI heavy load, this single lock becomes contended. But when CONFIG_BL_SWITCHER is not enabled, there is no reason to take this lock at all since the CPU mapping is immutable. This patch allows the lock to be entierely removed when BL_SWITCHER is not enabled (which is the case in most configurations), leading to a small improvement of "perf bench sched pipe" (measured on an 8 core AMD Seattle system): Before: 101370 ops/sec After: 103680 ops/sec Take this opportunity to remove a useless lock being taken when handling an interrupt on a secondary GIC. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'arch/arm64/include/asm/arch_gicv3.h')
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