aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm64/include/asm/arch_gicv3.h
diff options
context:
space:
mode:
authorJulien Thierry <julien.thierry@arm.com>2019-01-31 14:58:44 +0000
committerCatalin Marinas <catalin.marinas@arm.com>2019-02-06 10:05:18 +0000
commit3f1f3234bc2db1c16b9818b9a15a5d58ad45251c (patch)
tree5ebd1e626cf13bf5c92fe9ce85761092de2e6c43 /arch/arm64/include/asm/arch_gicv3.h
parentarm/arm64: gic-v3: Add PMR and RPR accessors (diff)
downloadlinux-dev-3f1f3234bc2db1c16b9818b9a15a5d58ad45251c.tar.xz
linux-dev-3f1f3234bc2db1c16b9818b9a15a5d58ad45251c.zip
irqchip/gic-v3: Switch to PMR masking before calling IRQ handler
Mask the IRQ priority through PMR and re-enable IRQs at CPU level, allowing only higher priority interrupts to be received during interrupt handling. Signed-off-by: Julien Thierry <julien.thierry@arm.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/include/asm/arch_gicv3.h')
-rw-r--r--arch/arm64/include/asm/arch_gicv3.h17
1 files changed, 17 insertions, 0 deletions
diff --git a/arch/arm64/include/asm/arch_gicv3.h b/arch/arm64/include/asm/arch_gicv3.h
index 37193e224a50..b5f8142bf802 100644
--- a/arch/arm64/include/asm/arch_gicv3.h
+++ b/arch/arm64/include/asm/arch_gicv3.h
@@ -155,5 +155,22 @@ static inline u32 gic_read_rpr(void)
#define gits_write_vpendbaser(v, c) writeq_relaxed(v, c)
#define gits_read_vpendbaser(c) readq_relaxed(c)
+static inline bool gic_prio_masking_enabled(void)
+{
+ return system_uses_irq_prio_masking();
+}
+
+static inline void gic_pmr_mask_irqs(void)
+{
+ /* Should not get called yet. */
+ WARN_ON_ONCE(true);
+}
+
+static inline void gic_arch_enable_irqs(void)
+{
+ /* Should not get called yet. */
+ WARN_ON_ONCE(true);
+}
+
#endif /* __ASSEMBLY__ */
#endif /* __ASM_ARCH_GICV3_H */