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authorWill Deacon <will.deacon@arm.com>2018-09-13 14:28:33 +0100
committerWill Deacon <will.deacon@arm.com>2018-12-07 17:28:01 +0000
commitb4f9209bfcd5964551de434342818334ab9c8c7e (patch)
tree69578d6a718bb6f9ff0f3f4cad3cecb801a88758 /arch/arm64/include/asm/atomic_lse.h
parentarm64: Avoid redundant type conversions in xchg() and cmpxchg() (diff)
downloadlinux-dev-b4f9209bfcd5964551de434342818334ab9c8c7e.tar.xz
linux-dev-b4f9209bfcd5964551de434342818334ab9c8c7e.zip
arm64: Avoid masking "old" for LSE cmpxchg() implementation
The CAS instructions implicitly access only the relevant bits of the "old" argument, so there is no need for explicit masking via type-casting as there is in the LL/SC implementation. Move the casting into the LL/SC code and remove it altogether for the LSE implementation. Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm64/include/asm/atomic_lse.h')
-rw-r--r--arch/arm64/include/asm/atomic_lse.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm64/include/asm/atomic_lse.h b/arch/arm64/include/asm/atomic_lse.h
index 4d6f917b654e..a424355240c5 100644
--- a/arch/arm64/include/asm/atomic_lse.h
+++ b/arch/arm64/include/asm/atomic_lse.h
@@ -448,11 +448,11 @@ static inline long atomic64_dec_if_positive(atomic64_t *v)
#define __CMPXCHG_CASE(w, sfx, name, sz, mb, cl...) \
static inline u##sz __cmpxchg_case_##name##sz(volatile void *ptr, \
- unsigned long old, \
+ u##sz old, \
u##sz new) \
{ \
register unsigned long x0 asm ("x0") = (unsigned long)ptr; \
- register unsigned long x1 asm ("x1") = old; \
+ register u##sz x1 asm ("x1") = old; \
register u##sz x2 asm ("x2") = new; \
\
asm volatile(ARM64_LSE_ATOMIC_INSN( \