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| author |   Will Deacon <will.deacon@arm.com> | 2019-04-29 13:03:57 +0100 |
|---|---|---|
| committer | Will Deacon <will.deacon@arm.com> | 2019-05-23 11:38:10 +0100 |
| commit | 969f5ea627570e91c9d54403287ee3ed657f58fe (patch) | |
| tree | cd631cd3cb473b8045b37063f153d221404a282d /arch/arm64/include/asm/cpucaps.h | |
| parent | arm64: Remove useless message during oops (diff) | |
| download | linux-dev-969f5ea627570e91c9d54403287ee3ed657f58fe.tar.xz linux-dev-969f5ea627570e91c9d54403287ee3ed657f58fe.zip | |
arm64: errata: Add workaround for Cortex-A76 erratum #1463225
Revisions of the Cortex-A76 CPU prior to r4p0 are affected by an erratum
that can prevent interrupts from being taken when single-stepping.
This patch implements a software workaround to prevent userspace from
effectively being able to disable interrupts.
Cc: <stable@vger.kernel.org>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm64/include/asm/cpucaps.h')
| -rw-r--r-- | arch/arm64/include/asm/cpucaps.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm64/include/asm/cpucaps.h b/arch/arm64/include/asm/cpucaps.h index defdc67d9ab4..73faee64e498 100644 --- a/arch/arm64/include/asm/cpucaps.h +++ b/arch/arm64/include/asm/cpucaps.h @@ -62,7 +62,8 @@ #define ARM64_HAS_GENERIC_AUTH_IMP_DEF 41 #define ARM64_HAS_IRQ_PRIO_MASKING 42 #define ARM64_HAS_DCPODP 43 +#define ARM64_WORKAROUND_1463225 44 -#define ARM64_NCAPS 44 +#define ARM64_NCAPS 45 #endif /* __ASM_CPUCAPS_H */ |