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authorWill Deacon <will.deacon@arm.com>2018-06-14 11:21:34 +0100
committerWill Deacon <will.deacon@arm.com>2018-12-06 16:47:04 +0000
commitbd4fb6d270bc423a9a4098108784f7f9254c4e6d (patch)
treeb795cee624fd00a3274c5d6efd89df71288cf1ff /arch/arm64/include/asm/cpucaps.h
parentarm64: capabilities: Batch cpu_enable callbacks (diff)
downloadlinux-dev-bd4fb6d270bc423a9a4098108784f7f9254c4e6d.tar.xz
linux-dev-bd4fb6d270bc423a9a4098108784f7f9254c4e6d.zip
arm64: Add support for SB barrier and patch in over DSB; ISB sequences
We currently use a DSB; ISB sequence to inhibit speculation in set_fs(). Whilst this works for current CPUs, future CPUs may implement a new SB barrier instruction which acts as an architected speculation barrier. On CPUs that support it, patch in an SB; NOP sequence over the DSB; ISB sequence and advertise the presence of the new instruction to userspace. Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm64/include/asm/cpucaps.h')
-rw-r--r--arch/arm64/include/asm/cpucaps.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm64/include/asm/cpucaps.h b/arch/arm64/include/asm/cpucaps.h
index 6e2d254c09eb..b7f0709a21af 100644
--- a/arch/arm64/include/asm/cpucaps.h
+++ b/arch/arm64/include/asm/cpucaps.h
@@ -54,7 +54,8 @@
#define ARM64_HAS_CRC32 33
#define ARM64_SSBS 34
#define ARM64_WORKAROUND_1188873 35
+#define ARM64_HAS_SB 36
-#define ARM64_NCAPS 36
+#define ARM64_NCAPS 37
#endif /* __ASM_CPUCAPS_H */