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| author |   Shanker Donthineni <shankerd@codeaurora.org> | 2018-03-05 11:06:43 -0600 |
|---|---|---|
| committer |   Marc Zyngier <marc.zyngier@arm.com> | 2018-03-19 18:35:38 +0000 |
| commit | f9f5dc19509bbef6f5e675346f1a7d7b846bdb12 (patch) | |
| tree | 76ddea08ea7d770e850adc95203e5dc165d362a1 /arch/arm64/include/asm/cpucaps.h | |
| parent | KVM: arm: Reserve bit in KVM_REG_ARM encoding for secure/nonsecure (diff) | |
| download | linux-dev-f9f5dc19509bbef6f5e675346f1a7d7b846bdb12.tar.xz linux-dev-f9f5dc19509bbef6f5e675346f1a7d7b846bdb12.zip | |
arm64: KVM: Use SMCCC_ARCH_WORKAROUND_1 for Falkor BP hardening
The function SMCCC_ARCH_WORKAROUND_1 was introduced as part of SMC
V1.1 Calling Convention to mitigate CVE-2017-5715. This patch uses
the standard call SMCCC_ARCH_WORKAROUND_1 for Falkor chips instead
of Silicon provider service ID 0xC2001700.
Cc: <stable@vger.kernel.org> # 4.14+
Signed-off-by: Shanker Donthineni <shankerd@codeaurora.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'arch/arm64/include/asm/cpucaps.h')
| -rw-r--r-- | arch/arm64/include/asm/cpucaps.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/include/asm/cpucaps.h b/arch/arm64/include/asm/cpucaps.h index d4cc54ed0656..c7dfe68fbcc7 100644 --- a/arch/arm64/include/asm/cpucaps.h +++ b/arch/arm64/include/asm/cpucaps.h @@ -43,7 +43,7 @@ #define ARM64_SVE 22 #define ARM64_UNMAP_KERNEL_AT_EL0 23 #define ARM64_HARDEN_BRANCH_PREDICTOR 24 -#define ARM64_HARDEN_BP_POST_GUEST_EXIT 25 +/* #define ARM64_UNUSED_CAP_TO_BE_REMOVED 25 */ #define ARM64_HAS_RAS_EXTN 26 #define ARM64_NCAPS 27 |