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| author |   Kristina Martsenko <kristina.martsenko@arm.com> | 2017-12-13 17:07:21 +0000 |
|---|---|---|
| committer |   Catalin Marinas <catalin.marinas@arm.com> | 2017-12-22 17:37:18 +0000 |
| commit | 75387b92635e7dca410c1ef92cfe510019248f76 (patch) | |
| tree | d3e2a0a1caee5599f1c53527a5671fd978da42a1 /arch/arm64/include/asm/pgtable-hwdef.h | |
| parent | arm64: don't open code page table entry creation (diff) | |
| download | linux-dev-75387b92635e7dca410c1ef92cfe510019248f76.tar.xz linux-dev-75387b92635e7dca410c1ef92cfe510019248f76.zip | |
arm64: handle 52-bit physical addresses in page table entries
The top 4 bits of a 52-bit physical address are positioned at bits
12..15 of a page table entry. Introduce macros to convert between a
physical address and its placement in a table entry, and change all
macros/functions that access PTEs to use them.
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Tested-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Tested-by: Bob Picco <bob.picco@oracle.com>
Reviewed-by: Bob Picco <bob.picco@oracle.com>
Signed-off-by: Kristina Martsenko <kristina.martsenko@arm.com>
[catalin.marinas@arm.com: some long lines wrapped]
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/include/asm/pgtable-hwdef.h')
| -rw-r--r-- | arch/arm64/include/asm/pgtable-hwdef.h | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm64/include/asm/pgtable-hwdef.h b/arch/arm64/include/asm/pgtable-hwdef.h index 5513ccd687f4..85069f37ae37 100644 --- a/arch/arm64/include/asm/pgtable-hwdef.h +++ b/arch/arm64/include/asm/pgtable-hwdef.h @@ -168,10 +168,12 @@ #define PTE_UXN (_AT(pteval_t, 1) << 54) /* User XN */ #define PTE_HYP_XN (_AT(pteval_t, 1) << 54) /* HYP XN */ -#ifdef CONFIG_ARM64_PA_BITS_52 #define PTE_ADDR_LOW (((_AT(pteval_t, 1) << (48 - PAGE_SHIFT)) - 1) << PAGE_SHIFT) +#ifdef CONFIG_ARM64_PA_BITS_52 #define PTE_ADDR_HIGH (_AT(pteval_t, 0xf) << 12) -#define PTE_ADDR_MASK_52 (PTE_ADDR_LOW | PTE_ADDR_HIGH) +#define PTE_ADDR_MASK (PTE_ADDR_LOW | PTE_ADDR_HIGH) +#else +#define PTE_ADDR_MASK PTE_ADDR_LOW #endif /* |