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authorJulien Thierry <julien.thierry@arm.com>2019-01-31 14:58:45 +0000
committerCatalin Marinas <catalin.marinas@arm.com>2019-02-06 10:05:18 +0000
commitcdbc81ddef43c8fdcbd3a26e1a7530c70b629cfc (patch)
tree5f219af16aa267dbdfd27bf4276533c181527c26 /arch/arm64/include/asm/ptrace.h
parentirqchip/gic-v3: Switch to PMR masking before calling IRQ handler (diff)
downloadlinux-dev-cdbc81ddef43c8fdcbd3a26e1a7530c70b629cfc.tar.xz
linux-dev-cdbc81ddef43c8fdcbd3a26e1a7530c70b629cfc.zip
arm64: ptrace: Provide definitions for PMR values
Introduce fixed values for PMR that are going to be used to mask and unmask interrupts by priority. The current priority given to GIC interrupts is 0xa0, so clearing PMR's most significant bit is enough to mask interrupts. Signed-off-by: Julien Thierry <julien.thierry@arm.com> Suggested-by: Daniel Thompson <daniel.thompson@linaro.org> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Oleg Nesterov <oleg@redhat.com> Cc: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/include/asm/ptrace.h')
-rw-r--r--arch/arm64/include/asm/ptrace.h12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm64/include/asm/ptrace.h b/arch/arm64/include/asm/ptrace.h
index fce22c4b2f73..8b131bc8984d 100644
--- a/arch/arm64/include/asm/ptrace.h
+++ b/arch/arm64/include/asm/ptrace.h
@@ -25,6 +25,18 @@
#define CurrentEL_EL1 (1 << 2)
#define CurrentEL_EL2 (2 << 2)
+/*
+ * PMR values used to mask/unmask interrupts.
+ *
+ * GIC priority masking works as follows: if an IRQ's priority is a higher value
+ * than the value held in PMR, that IRQ is masked. Lowering the value of PMR
+ * means masking more IRQs (or at least that the same IRQs remain masked).
+ *
+ * To mask interrupts, we clear the most significant bit of PMR.
+ */
+#define GIC_PRIO_IRQON 0xf0
+#define GIC_PRIO_IRQOFF (GIC_PRIO_IRQON & ~0x80)
+
/* Additional SPSR bits not exposed in the UABI */
#define PSR_IL_BIT (1 << 20)