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| author |   Mark Brown <broonie@kernel.org> | 2022-09-05 23:54:22 +0100 |
|---|---|---|
| committer |   Catalin Marinas <catalin.marinas@arm.com> | 2022-09-09 10:59:06 +0100 |
| commit | ef4ba5a635bfbd98c0893430ddfc9baf9fbccee6 (patch) | |
| tree | 5a4da87f4ac52bb2d9b3ba71ed918b6dc774988d /arch/arm64/include/asm/sysreg.h | |
| parent | arm64/sysreg: Convert ID_AA64PFR0_EL1 to automatic generation (diff) | |
| download | linux-dev-ef4ba5a635bfbd98c0893430ddfc9baf9fbccee6.tar.xz linux-dev-ef4ba5a635bfbd98c0893430ddfc9baf9fbccee6.zip | |
arm64/sysreg: Convert ID_AA64PFR1_EL1 to automatic generation
Convert ID_AA64PFR1_EL1 to be automatically generated as per DDI04187H.a,
no functional changes.
Signed-off-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Kristina Martsenko <kristina.martsenko@arm.com>
Link: https://lore.kernel.org/r/20220905225425.1871461-26-broonie@kernel.org
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/include/asm/sysreg.h')
| -rw-r--r-- | arch/arm64/include/asm/sysreg.h | 21 |
1 files changed, 0 insertions, 21 deletions
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index 2f032ea7e7e8..e78d9dc1024d 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -190,8 +190,6 @@ #define SYS_MVFR1_EL1 sys_reg(3, 0, 0, 3, 1) #define SYS_MVFR2_EL1 sys_reg(3, 0, 0, 3, 2) -#define SYS_ID_AA64PFR1_EL1 sys_reg(3, 0, 0, 4, 1) - #define SYS_ID_AA64DFR0_EL1 sys_reg(3, 0, 0, 5, 0) #define SYS_ID_AA64DFR1_EL1 sys_reg(3, 0, 0, 5, 1) @@ -683,25 +681,6 @@ #define ID_AA64PFR0_EL1_ELx_64BIT_ONLY 0x1 #define ID_AA64PFR0_EL1_ELx_32BIT_64BIT 0x2 -/* id_aa64pfr1 */ -#define ID_AA64PFR1_EL1_SME_SHIFT 24 -#define ID_AA64PFR1_EL1_MPAM_frac_SHIFT 16 -#define ID_AA64PFR1_EL1_RAS_frac_SHIFT 12 -#define ID_AA64PFR1_EL1_MTE_SHIFT 8 -#define ID_AA64PFR1_EL1_SSBS_SHIFT 4 -#define ID_AA64PFR1_EL1_BT_SHIFT 0 - -#define ID_AA64PFR1_EL1_SSBS_NI 0 -#define ID_AA64PFR1_EL1_SSBS_IMP 1 -#define ID_AA64PFR1_EL1_SSBS_SSBS2 2 -#define ID_AA64PFR1_EL1_BT_IMP 0x1 -#define ID_AA64PFR1_EL1_SME_IMP 1 - -#define ID_AA64PFR1_EL1_MTE_NI 0x0 -#define ID_AA64PFR1_EL1_MTE_IMP 0x1 -#define ID_AA64PFR1_EL1_MTE_MTE2 0x2 -#define ID_AA64PFR1_EL1_MTE_MTE3 0x3 - /* id_aa64mmfr0 */ #define ID_AA64MMFR0_EL1_TGRAN4_SUPPORTED_MIN 0x0 #define ID_AA64MMFR0_EL1_TGRAN4_SUPPORTED_MAX 0x7 |