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| author |   Shannon Zhao <shannon.zhao@linaro.org> | 2015-12-08 15:29:06 +0800 |
|---|---|---|
| committer |   Marc Zyngier <marc.zyngier@arm.com> | 2016-02-29 18:34:20 +0000 |
| commit | 051ff581ce70e822729e9474941f3c206cbf7436 (patch) | |
| tree | 3df20342cf7ae5df7afaed1116f3dd242cccefe2 /arch/arm64/include | |
| parent | arm64: KVM: Add access handler for PMCEID0 and PMCEID1 register (diff) | |
| download | linux-dev-051ff581ce70e822729e9474941f3c206cbf7436.tar.xz linux-dev-051ff581ce70e822729e9474941f3c206cbf7436.zip | |
arm64: KVM: Add access handler for event counter register
These kind of registers include PMEVCNTRn, PMCCNTR and PMXEVCNTR which
is mapped to PMEVCNTRn.
The access handler translates all aarch32 register offsets to aarch64
ones and uses vcpu_sys_reg() to access their values to avoid taking care
of big endian.
When reading these registers, return the sum of register value and the
value perf event counts.
Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org>
Reviewed-by: Andrew Jones <drjones@redhat.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'arch/arm64/include')
| -rw-r--r-- | arch/arm64/include/asm/kvm_host.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h index 57a2d8f76c2f..4ae27fe34240 100644 --- a/arch/arm64/include/asm/kvm_host.h +++ b/arch/arm64/include/asm/kvm_host.h @@ -120,6 +120,9 @@ enum vcpu_sysreg { /* Performance Monitors Registers */ PMCR_EL0, /* Control Register */ PMSELR_EL0, /* Event Counter Selection Register */ + PMEVCNTR0_EL0, /* Event Counter Register (0-30) */ + PMEVCNTR30_EL0 = PMEVCNTR0_EL0 + 30, + PMCCNTR_EL0, /* Cycle Counter Register */ /* 32bit specific registers. Keep them at the end of the range */ DACR32_EL2, /* Domain Access Control Register */ |