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authorFuad Tabba <tabba@google.com>2021-05-24 09:29:55 +0100
committerWill Deacon <will@kernel.org>2021-05-25 19:27:49 +0100
commit814b186079cd54d3fe3b6b8ab539cbd44705ef9d (patch)
treec2433f7dff0bb3a36a2425f38429a7e12b84ced2 /arch/arm64/mm/cache.S
parentarm64: dcache_by_line_op to take end parameter instead of size (diff)
downloadlinux-dev-814b186079cd54d3fe3b6b8ab539cbd44705ef9d.tar.xz
linux-dev-814b186079cd54d3fe3b6b8ab539cbd44705ef9d.zip
arm64: __flush_dcache_area to take end parameter instead of size
To be consistent with other functions with similar names and functionality in cacheflush.h, cache.S, and cachetlb.rst, change to specify the range in terms of start and end, as opposed to start and size. No functional change intended. Reported-by: Will Deacon <will@kernel.org> Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Fuad Tabba <tabba@google.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Link: https://lore.kernel.org/r/20210524083001.2586635-13-tabba@google.com Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'arch/arm64/mm/cache.S')
-rw-r--r--arch/arm64/mm/cache.S9
1 files changed, 4 insertions, 5 deletions
diff --git a/arch/arm64/mm/cache.S b/arch/arm64/mm/cache.S
index fff883f691f2..b2880aeba7ca 100644
--- a/arch/arm64/mm/cache.S
+++ b/arch/arm64/mm/cache.S
@@ -99,16 +99,15 @@ alternative_else_nop_endif
SYM_FUNC_END(invalidate_icache_range)
/*
- * __flush_dcache_area(kaddr, size)
+ * __flush_dcache_area(start, end)
*
- * Ensure that any D-cache lines for the interval [kaddr, kaddr+size)
+ * Ensure that any D-cache lines for the interval [start, end)
* are cleaned and invalidated to the PoC.
*
- * - kaddr - kernel address
- * - size - size in question
+ * - start - virtual start address of region
+ * - end - virtual end address of region
*/
SYM_FUNC_START_PI(__flush_dcache_area)
- add x1, x0, x1
dcache_by_line_op civac, sy, x0, x1, x2, x3
ret
SYM_FUNC_END_PI(__flush_dcache_area)