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authorWill Deacon <will.deacon@arm.com>2017-03-10 20:32:23 +0000
committerCatalin Marinas <catalin.marinas@arm.com>2017-03-20 16:16:59 +0000
commit02f7760e6e5c3d726cd9622749cdae17c571b9a3 (patch)
treec32de8d89af2f29b2ef15e6e4d88916d6db93427 /arch/arm64/mm/flush.c
parentarm64: cache: Remove support for ASID-tagged VIVT I-caches (diff)
downloadlinux-dev-02f7760e6e5c3d726cd9622749cdae17c571b9a3.tar.xz
linux-dev-02f7760e6e5c3d726cd9622749cdae17c571b9a3.zip
arm64: cache: Merge cachetype.h into cache.h
cachetype.h and cache.h are small and both obviously related to caches. Merge them together to reduce clutter. Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/mm/flush.c')
-rw-r--r--arch/arm64/mm/flush.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/mm/flush.c b/arch/arm64/mm/flush.c
index 1e968222a544..21a8d828cbf4 100644
--- a/arch/arm64/mm/flush.c
+++ b/arch/arm64/mm/flush.c
@@ -22,7 +22,7 @@
#include <linux/pagemap.h>
#include <asm/cacheflush.h>
-#include <asm/cachetype.h>
+#include <asm/cache.h>
#include <asm/tlbflush.h>
void sync_icache_aliases(void *kaddr, unsigned long len)