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| author |   Chris Packham <chris.packham@alliedtelesis.co.nz> | 2021-12-06 11:56:17 +1300 |
|---|---|---|
| committer |   Gregory CLEMENT <gregory.clement@bootlin.com> | 2021-12-17 18:04:30 +0100 |
| commit | 1f1cb308abc5272551b7db9c0d31733478f829bf (patch) | |
| tree | 0e7a8157ff5f794f6a51d816d52e1cc1e9c7bc27 /arch/arm64 | |
| parent | Linux 5.16-rc1 (diff) | |
| download | linux-dev-1f1cb308abc5272551b7db9c0d31733478f829bf.tar.xz linux-dev-1f1cb308abc5272551b7db9c0d31733478f829bf.zip | |
arm/arm64: dts: Enable CP0 GPIOs for CN9130-CRB
Enable the CP0 GPIO devices for the CN9130-CRB. This is needed for a
number of the peripheral devices to function.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Diffstat (limited to 'arch/arm64')
| -rw-r--r-- | arch/arm64/boot/dts/marvell/cn9130-crb.dtsi | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi b/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi index 505ae69289f6..c491e3379405 100644 --- a/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi +++ b/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi @@ -17,6 +17,8 @@ ethernet0 = &cp0_eth0; ethernet1 = &cp0_eth1; ethernet2 = &cp0_eth2; + gpio1 = &cp0_gpio1; + gpio2 = &cp0_gpio2; }; memory@0 { @@ -114,6 +116,14 @@ }; }; +&cp0_gpio1 { + status = "okay"; +}; + +&cp0_gpio2 { + status = "okay"; +}; + &cp0_i2c0 { pinctrl-names = "default"; pinctrl-0 = <&cp0_i2c0_pins>; |