diff options
| author |   Bhupesh Sharma <bhupesh.sharma@linaro.org> | 2022-05-15 03:24:19 +0530 |
|---|---|---|
| committer |   Bjorn Andersson <bjorn.andersson@linaro.org> | 2022-07-02 22:20:56 -0500 |
| commit | 2477d81901a23ad80045798edbeb7f91b5ff6143 (patch) | |
| tree | 4fb2e733ed6310a51a544ed17bc910068a4078d7 /arch/arm | |
| parent | ARM: dts: qcom: apq8064: drop phy-names from HDMI device node (diff) | |
| download | linux-dev-2477d81901a23ad80045798edbeb7f91b5ff6143.tar.xz linux-dev-2477d81901a23ad80045798edbeb7f91b5ff6143.zip | |
ARM: dts: qcom: Fix sdhci node names - use 'mmc@'
Since the Qualcomm sdhci-msm device-tree binding has been converted
to yaml format, 'make dtbs_check' reports issues with
inconsistent 'sdhci@' convention used for specifying the
sdhci nodes. The generic mmc bindings expect 'mmc@' format
instead.
Fix the same.
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
[bjorn: Extracted from combined arm64 patch]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220514215424.1007718-2-bhupesh.sharma@linaro.org
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/boot/dts/qcom-apq8084.dtsi | 4 | ||||
| -rw-r--r-- | arch/arm/boot/dts/qcom-ipq4019.dtsi | 2 | ||||
| -rw-r--r-- | arch/arm/boot/dts/qcom-msm8226.dtsi | 6 | ||||
| -rw-r--r-- | arch/arm/boot/dts/qcom-msm8974.dtsi | 6 | ||||
| -rw-r--r-- | arch/arm/boot/dts/qcom-sdx55.dtsi | 2 | ||||
| -rw-r--r-- | arch/arm/boot/dts/qcom-sdx65.dtsi | 2 |
6 files changed, 11 insertions, 11 deletions
diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom-apq8084.dtsi index cb01faa23eb7..3e8bded2b5c8 100644 --- a/arch/arm/boot/dts/qcom-apq8084.dtsi +++ b/arch/arm/boot/dts/qcom-apq8084.dtsi @@ -419,7 +419,7 @@ status = "disabled"; }; - sdhci@f9824900 { + mmc@f9824900 { compatible = "qcom,apq8084-sdhci", "qcom,sdhci-msm-v4"; reg = <0xf9824900 0x11c>, <0xf9824000 0x800>; reg-names = "hc_mem", "core_mem"; @@ -432,7 +432,7 @@ status = "disabled"; }; - sdhci@f98a4900 { + mmc@f98a4900 { compatible = "qcom,apq8084-sdhci", "qcom,sdhci-msm-v4"; reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>; reg-names = "hc_mem", "core_mem"; diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi index c5da723f7674..a2632349cec4 100644 --- a/arch/arm/boot/dts/qcom-ipq4019.dtsi +++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi @@ -221,7 +221,7 @@ status = "disabled"; }; - sdhci: sdhci@7824900 { + sdhci: mmc@7824900 { compatible = "qcom,sdhci-msm-v4"; reg = <0x7824900 0x11c>, <0x7824000 0x800>; interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; diff --git a/arch/arm/boot/dts/qcom-msm8226.dtsi b/arch/arm/boot/dts/qcom-msm8226.dtsi index 28eca15b5712..0b5effdb269a 100644 --- a/arch/arm/boot/dts/qcom-msm8226.dtsi +++ b/arch/arm/boot/dts/qcom-msm8226.dtsi @@ -134,7 +134,7 @@ reg = <0xf9011000 0x1000>; }; - sdhc_1: sdhci@f9824900 { + sdhc_1: mmc@f9824900 { compatible = "qcom,msm8226-sdhci", "qcom,sdhci-msm-v4"; reg = <0xf9824900 0x11c>, <0xf9824000 0x800>; reg-names = "hc_mem", "core_mem"; @@ -150,7 +150,7 @@ status = "disabled"; }; - sdhc_2: sdhci@f98a4900 { + sdhc_2: mmc@f98a4900 { compatible = "qcom,msm8226-sdhci", "qcom,sdhci-msm-v4"; reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>; reg-names = "hc_mem", "core_mem"; @@ -166,7 +166,7 @@ status = "disabled"; }; - sdhc_3: sdhci@f9864900 { + sdhc_3: mmc@f9864900 { compatible = "qcom,msm8226-sdhci", "qcom,sdhci-msm-v4"; reg = <0xf9864900 0x11c>, <0xf9864000 0x800>; reg-names = "hc_mem", "core_mem"; diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi index 5e3ad97c579e..8131d3e222cb 100644 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -436,7 +436,7 @@ reg = <0xf90b8000 0x1000>, <0xf9008000 0x1000>; }; - sdhc_1: sdhci@f9824900 { + sdhc_1: mmc@f9824900 { compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4"; reg = <0xf9824900 0x11c>, <0xf9824000 0x800>; reg-names = "hc_mem", "core_mem"; @@ -453,7 +453,7 @@ status = "disabled"; }; - sdhc_3: sdhci@f9864900 { + sdhc_3: mmc@f9864900 { compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4"; reg = <0xf9864900 0x11c>, <0xf9864000 0x800>; reg-names = "hc_mem", "core_mem"; @@ -472,7 +472,7 @@ status = "disabled"; }; - sdhc_2: sdhci@f98a4900 { + sdhc_2: mmc@f98a4900 { compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4"; reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>; reg-names = "hc_mem", "core_mem"; diff --git a/arch/arm/boot/dts/qcom-sdx55.dtsi b/arch/arm/boot/dts/qcom-sdx55.dtsi index f37091143ac5..c72540223fa9 100644 --- a/arch/arm/boot/dts/qcom-sdx55.dtsi +++ b/arch/arm/boot/dts/qcom-sdx55.dtsi @@ -388,7 +388,7 @@ reg = <0x01fc0000 0x1000>; }; - sdhc_1: sdhci@8804000 { + sdhc_1: mmc@8804000 { compatible = "qcom,sdx55-sdhci", "qcom,sdhci-msm-v5"; reg = <0x08804000 0x1000>; interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi index 1881b6d2485b..7a193678b4f5 100644 --- a/arch/arm/boot/dts/qcom-sdx65.dtsi +++ b/arch/arm/boot/dts/qcom-sdx65.dtsi @@ -331,7 +331,7 @@ }; }; - sdhc_1: sdhci@8804000 { + sdhc_1: mmc@8804000 { compatible = "qcom,sdx65-sdhci", "qcom,sdhci-msm-v5"; reg = <0x08804000 0x1000>; reg-names = "hc_mem"; |