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authorThomas Abraham <thomas.ab@samsung.com>2010-06-21 14:21:54 +0530
committerKukjin Kim <kgene.kim@samsung.com>2010-07-05 16:01:04 +0900
commit4164acaf096fb92b67cdbde6b454dda773aa953b (patch)
tree537f56a69fd1d7261885f8c9535962a4934e499f /arch/arm
parentARM: SAMSUNG: Fix build without SDHCI controllers for S3C64XX (diff)
downloadlinux-dev-4164acaf096fb92b67cdbde6b454dda773aa953b.tar.xz
linux-dev-4164acaf096fb92b67cdbde6b454dda773aa953b.zip
ARM: S5P6442: Fix PLL setting announce message.
The S5P6442 PLL setting announce message incorrectly displays S5P6440 as the SoC. Change it to S5P6442. Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-s5p6442/clock.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-s5p6442/clock.c b/arch/arm/mach-s5p6442/clock.c
index 3aadbf42c112..087e57f20ad5 100644
--- a/arch/arm/mach-s5p6442/clock.c
+++ b/arch/arm/mach-s5p6442/clock.c
@@ -294,7 +294,7 @@ void __init_or_cpufreq s5p6442_setup_clocks(void)
mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P_MPLL_CON), pll_4502);
epll = s5p_get_pll45xx(xtal, __raw_readl(S5P_EPLL_CON), pll_4500);
- printk(KERN_INFO "S5P6440: PLL settings, A=%ld, M=%ld, E=%ld",
+ printk(KERN_INFO "S5P6442: PLL settings, A=%ld, M=%ld, E=%ld",
apll, mpll, epll);
clk_fout_apll.rate = apll;