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| author |   Arnd Bergmann <arnd@arndb.de> | 2017-12-21 16:59:19 +0100 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2017-12-21 16:59:19 +0100 |
| commit | 6b457409169b7686d293b408da0b6446ccb57a76 (patch) | |
| tree | f231d78cfa4c80c873b0e37249dd008b0ba9253f /arch/arm | |
| parent | ARM: dts: aspeed-g4: Correct VUART IRQ number (diff) | |
| parent | ARM: dts: rockchip: fix rk3288 iep-IOMMU interrupts property cells (diff) | |
| download | linux-dev-6b457409169b7686d293b408da0b6446ccb57a76.tar.xz linux-dev-6b457409169b7686d293b408da0b6446ccb57a76.zip | |
Merge tag 'v4.15-rockchip-dts32fixes-1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into fixes
Pull "Rockchip dts32 fixes for 4.15" from Heiko Stübner:
Removed another trailing interrupt-cell 0 and added the cpu regulator
on the rk3066a-marsboard to make it not fail from cpufreq changes.
* tag 'v4.15-rockchip-dts32fixes-1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: fix rk3288 iep-IOMMU interrupts property cells
ARM: dts: rockchip: add cpu0-regulator on rk3066a-marsboard
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/boot/dts/rk3066a-marsboard.dts | 4 | ||||
| -rw-r--r-- | arch/arm/boot/dts/rk3288.dtsi | 2 |
2 files changed, 5 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/rk3066a-marsboard.dts b/arch/arm/boot/dts/rk3066a-marsboard.dts index c6d92c25df42..d23ee6d911ac 100644 --- a/arch/arm/boot/dts/rk3066a-marsboard.dts +++ b/arch/arm/boot/dts/rk3066a-marsboard.dts @@ -83,6 +83,10 @@ }; }; +&cpu0 { + cpu0-supply = <&vdd_arm>; +}; + &i2c1 { status = "okay"; clock-frequency = <400000>; diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index cd24894ee5c6..6102e4e7f35c 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -956,7 +956,7 @@ iep_mmu: iommu@ff900800 { compatible = "rockchip,iommu"; reg = <0x0 0xff900800 0x0 0x40>; - interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH 0>; + interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "iep_mmu"; #iommu-cells = <0>; status = "disabled"; |