diff options
| author |   Arnd Bergmann <arnd@arndb.de> | 2021-08-26 11:45:06 +0200 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2021-08-26 11:45:06 +0200 |
| commit | 9fdbbe8443a372088c809eb8f2cf4488a41333e8 (patch) | |
| tree | 5d6b3149b94d532351458f1c85d7f1e2013873f9 /arch/arm | |
| parent | Merge tag 'v5.15-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt (diff) | |
| parent | ARM: dts: ebaz4205: enable NAND support (diff) | |
| download | linux-dev-9fdbbe8443a372088c809eb8f2cf4488a41333e8.tar.xz linux-dev-9fdbbe8443a372088c809eb8f2cf4488a41333e8.zip | |
Merge tag 'zynq-dt-for-v5.15' of https://github.com/Xilinx/linux-xlnx into arm/dt
ARM: dts: Zynq DT changes for v5.15
- Enable nand flash controller for ebaz4205 board
* tag 'zynq-dt-for-v5.15' of https://github.com/Xilinx/linux-xlnx:
ARM: dts: ebaz4205: enable NAND support
ARM: dts: zynq: add NAND flash controller node
Link: https://lore.kernel.org/r/f3dc69c8-8a22-e938-4ddf-b1052b8c1437@monstr.eu
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/boot/dts/zynq-7000.dtsi | 21 | ||||
| -rw-r--r-- | arch/arm/boot/dts/zynq-ebaz4205.dts | 12 |
2 files changed, 33 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi index df9ad831cf05..47c2a4b14c06 100644 --- a/arch/arm/boot/dts/zynq-7000.dtsi +++ b/arch/arm/boot/dts/zynq-7000.dtsi @@ -252,6 +252,27 @@ #size-cells = <0>; }; + smcc: memory-controller@e000e000 { + compatible = "arm,pl353-smc-r2p1", "arm,primecell"; + reg = <0xe000e000 0x0001000>; + status = "disabled"; + clock-names = "memclk", "apb_pclk"; + clocks = <&clkc 11>, <&clkc 44>; + ranges = <0x0 0x0 0xe1000000 0x1000000 /* Nand CS region */ + 0x1 0x0 0xe2000000 0x2000000 /* SRAM/NOR CS0 region */ + 0x2 0x0 0xe4000000 0x2000000>; /* SRAM/NOR CS1 region */ + #address-cells = <2>; + #size-cells = <1>; + + nfc0: nand-controller@0,0 { + compatible = "arm,pl353-nand-r2p1"; + reg = <0 0 0x1000000>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + sdhci0: mmc@e0100000 { compatible = "arasan,sdhci-8.9a"; status = "disabled"; diff --git a/arch/arm/boot/dts/zynq-ebaz4205.dts b/arch/arm/boot/dts/zynq-ebaz4205.dts index b0b836aedd76..53fa6dbfd8fd 100644 --- a/arch/arm/boot/dts/zynq-ebaz4205.dts +++ b/arch/arm/boot/dts/zynq-ebaz4205.dts @@ -48,6 +48,14 @@ pinctrl-0 = <&pinctrl_gpio0_default>; }; +&nfc0 { + status = "okay"; + + nand@0 { + reg = <0>; + }; +}; + &pinctrl0 { pinctrl_gpio0_default: gpio0-default { mux { @@ -118,6 +126,10 @@ }; }; +&smcc { + status = "okay"; +}; + &sdhci0 { status = "okay"; disable-wp; |