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| author |   Ken Chen <j220584470k@gmail.com> | 2022-08-05 17:09:57 +0800 |
|---|---|---|
| committer |   Joel Stanley <joel@jms.id.au> | 2022-09-28 12:31:40 +0930 |
| commit | e360b84c3366d02784972086bed8cf60bce64f3b (patch) | |
| tree | 32109b2d2ee42b91af962274a2da939877856e10 /arch/arm | |
| parent | ARM: dts: aspeed: yosemitev2: Disable the EEPROM driver (diff) | |
| download | linux-dev-e360b84c3366d02784972086bed8cf60bce64f3b.tar.xz linux-dev-e360b84c3366d02784972086bed8cf60bce64f3b.zip | |
ARM: dts: aspeed-g6: Enable more UART controllers
Setup the configuration of UART6, UART7, UART8, and UART9 in
aspeed-g6.dtsi.
Signed-off-by: Ken Chen <j220584470k@gmail.com>
Link: https://lore.kernel.org/r/20220805090957.470434-1-j220584470k@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/boot/dts/aspeed-g6.dtsi | 56 |
1 files changed, 56 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi index 6660564855ff..1387a763a6a5 100644 --- a/arch/arm/boot/dts/aspeed-g6.dtsi +++ b/arch/arm/boot/dts/aspeed-g6.dtsi @@ -756,6 +756,62 @@ status = "disabled"; }; + uart6: serial@1e790000 { + compatible = "ns16550a"; + reg = <0x1e790000 0x20>; + reg-shift = <2>; + reg-io-width = <4>; + interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&syscon ASPEED_CLK_GATE_UART6CLK>; + no-loopback-test; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart6_default>; + + status = "disabled"; + }; + + uart7: serial@1e790100 { + compatible = "ns16550a"; + reg = <0x1e790100 0x20>; + reg-shift = <2>; + reg-io-width = <4>; + interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&syscon ASPEED_CLK_GATE_UART7CLK>; + no-loopback-test; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart7_default>; + + status = "disabled"; + }; + + uart8: serial@1e790200 { + compatible = "ns16550a"; + reg = <0x1e790200 0x20>; + reg-shift = <2>; + reg-io-width = <4>; + interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&syscon ASPEED_CLK_GATE_UART8CLK>; + no-loopback-test; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart8_default>; + + status = "disabled"; + }; + + uart9: serial@1e790300 { + compatible = "ns16550a"; + reg = <0x1e790300 0x20>; + reg-shift = <2>; + reg-io-width = <4>; + interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&syscon ASPEED_CLK_GATE_UART9CLK>; + no-loopback-test; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart9_default>; + + status = "disabled"; + }; + i2c: bus@1e78a000 { compatible = "simple-bus"; #address-cells = <1>; |