aboutsummaryrefslogtreecommitdiffstats
path: root/arch/avr32/include
diff options
context:
space:
mode:
authorIlya Loginov <isloginov@gmail.com>2009-11-26 09:16:19 +0100
committerJens Axboe <jens.axboe@oracle.com>2009-11-26 09:16:19 +0100
commit2d4dc890b5c8fabd818a8586607e6843c4375e62 (patch)
tree9976ed7b0eed0056f8289aeb6a2b0abf8c940454 /arch/avr32/include
parentcfq: Make use of service count to estimate the rb_key offset (diff)
downloadlinux-dev-2d4dc890b5c8fabd818a8586607e6843c4375e62.tar.xz
linux-dev-2d4dc890b5c8fabd818a8586607e6843c4375e62.zip
block: add helpers to run flush_dcache_page() against a bio and a request's pages
Mtdblock driver doesn't call flush_dcache_page for pages in request. So, this causes problems on architectures where the icache doesn't fill from the dcache or with dcache aliases. The patch fixes this. The ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE symbol was introduced to avoid pointless empty cache-thrashing loops on architectures for which flush_dcache_page() is a no-op. Every architecture was provided with this flush pages on architectires where ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE is equal 1 or do nothing otherwise. See "fix mtd_blkdevs problem with caches on some architectures" discussion on LKML for more information. Signed-off-by: Ilya Loginov <isloginov@gmail.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Peter Horton <phorton@bitbox.co.uk> Cc: "Ed L. Cashin" <ecashin@coraid.com> Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
Diffstat (limited to 'arch/avr32/include')
-rw-r--r--arch/avr32/include/asm/cacheflush.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/avr32/include/asm/cacheflush.h b/arch/avr32/include/asm/cacheflush.h
index 670674749b20..96e53820bbbd 100644
--- a/arch/avr32/include/asm/cacheflush.h
+++ b/arch/avr32/include/asm/cacheflush.h
@@ -107,6 +107,7 @@ extern void flush_icache_page(struct vm_area_struct *vma, struct page *page);
* do something here, but only for certain configurations. No such
* configurations exist at this time.
*/
+#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0
#define flush_dcache_page(page) do { } while (0)
#define flush_dcache_mmap_lock(page) do { } while (0)
#define flush_dcache_mmap_unlock(page) do { } while (0)