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authorBorislav Petkov <bp@suse.de>2018-05-17 18:32:33 +0200
committerThomas Gleixner <tglx@linutronix.de>2018-05-19 15:21:46 +0200
commitfbf96cf904dc154a28338fe68f72902e9af57afc (patch)
tree882a87cc70d8b4c4261c4bce51047efee78a2714 /arch/hexagon
parentMerge branch 'ras/urgent' into ras/core (diff)
downloadlinux-dev-fbf96cf904dc154a28338fe68f72902e9af57afc.tar.xz
linux-dev-fbf96cf904dc154a28338fe68f72902e9af57afc.zip
x86/MCE/AMD: Read MCx_MISC block addresses on any CPU
We used rdmsr_safe_on_cpu() to make sure we're reading the proper CPU's MISC block addresses. However, that caused trouble with CPU hotplug due to the _on_cpu() helper issuing an IPI while IRQs are disabled. But we don't have to do that: the block addresses are the same on any CPU so we can read them on any CPU. (What practically happens is, we read them on the BSP and cache them, and for later reads, we service them from the cache). Suggested-by: Yazen Ghannam <Yazen.Ghannam@amd.com> Signed-off-by: Borislav Petkov <bp@suse.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/hexagon')
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