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| author |   David Woodhouse <dwmw@amazon.co.uk> | 2017-04-12 13:25:54 +0100 |
|---|---|---|
| committer |   Bjorn Helgaas <bhelgaas@google.com> | 2017-04-18 13:01:42 -0500 |
| commit | ae749c7ab475de2c9c427058db19921c91846e89 (patch) | |
| tree | 0fbb5e8de9c0827c196f5296409622beb5e9aec9 /arch/ia64 | |
| parent | xtensa/PCI: Do not mmap PCI BARs to userspace as write-through (diff) | |
| download | linux-dev-ae749c7ab475de2c9c427058db19921c91846e89.tar.xz linux-dev-ae749c7ab475de2c9c427058db19921c91846e89.zip | |
PCI: Add arch_can_pci_mmap_wc() macro
Most of the almost-identical versions of pci_mmap_page_range() silently
ignore the 'write_combine' argument and give uncached mappings.
Yet we allow the PCIIOC_WRITE_COMBINE ioctl in /proc/bus/pci, expose the
'resourceX_wc' file in sysfs, and allow an attempted mapping to apparently
succeed.
To fix this, introduce a macro arch_can_pci_mmap_wc() which indicates
whether the platform can do a write-combining mapping. On x86 this ends up
being pat_enabled(), while the few other platforms that support it can just
set it to a literal '1'.
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'arch/ia64')
| -rw-r--r-- | arch/ia64/include/asm/pci.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/ia64/include/asm/pci.h b/arch/ia64/include/asm/pci.h index c0835b0dc722..6283758474ad 100644 --- a/arch/ia64/include/asm/pci.h +++ b/arch/ia64/include/asm/pci.h @@ -51,6 +51,8 @@ extern unsigned long ia64_max_iommu_merge_mask; #define PCI_DMA_BUS_IS_PHYS (ia64_max_iommu_merge_mask == ~0UL) #define HAVE_PCI_MMAP +#define arch_can_pci_mmap_wc() 1 + extern int pci_mmap_page_range (struct pci_dev *dev, struct vm_area_struct *vma, enum pci_mmap_state mmap_state, int write_combine); #define HAVE_PCI_LEGACY |