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| author |   Geert Uytterhoeven <geert@linux-m68k.org> | 2021-08-09 13:29:03 +0200 |
|---|---|---|
| committer | Geert Uytterhoeven <geert@linux-m68k.org> | 2021-08-23 13:23:57 +0200 |
| commit | 87d93029fe83e326d5b906e12e95600b157d2c0d (patch) | |
| tree | c3ec002c236f66c9f0b7ad110b840de8a8bfab44 /arch/m68k | |
| parent | m68k: Fix invalid RMW_INSNS on CPUs that lack CAS (diff) | |
| download | linux-dev-87d93029fe83e326d5b906e12e95600b157d2c0d.tar.xz linux-dev-87d93029fe83e326d5b906e12e95600b157d2c0d.zip | |
m68k: Fix asm register constraints for atomic ops
Depending on register assignment by the compiler:
{standard input}:3084: Error: operands mismatch -- statement `andl %a1,%d1' ignored
{standard input}:3145: Error: operands mismatch -- statement `orl %a1,%d1' ignored
{standard input}:3195: Error: operands mismatch -- statement `eorl %a1,%d1' ignored
Indeed, the first operand must not be an address register. However, it
can be an immediate value. Fix this by adjusting the register
constraint from "g" (general purpose register) to "di" (data register or
immediate).
Fixes: e39d88ea3ce4a471 ("locking/atomic, arch/m68k: Implement atomic_fetch_{add,sub,and,or,xor}()")
Fixes: d839bae4269aea46 ("locking,arch,m68k: Fold atomic_ops")
Fixes: 1da177e4c3f41524 ("Linux-2.6.12-rc2")
Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Arnd Bergmann <arnd@arndb.de>
Reported-by: Alexander Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Tested-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/20210809112903.3898660-1-geert@linux-m68k.org
Diffstat (limited to 'arch/m68k')
| -rw-r--r-- | arch/m68k/include/asm/atomic.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/m68k/include/asm/atomic.h b/arch/m68k/include/asm/atomic.h index 8637bf8a2f65..cfba83d230fd 100644 --- a/arch/m68k/include/asm/atomic.h +++ b/arch/m68k/include/asm/atomic.h @@ -48,7 +48,7 @@ static inline int arch_atomic_##op##_return(int i, atomic_t *v) \ " casl %2,%1,%0\n" \ " jne 1b" \ : "+m" (*v), "=&d" (t), "=&d" (tmp) \ - : "g" (i), "2" (arch_atomic_read(v))); \ + : "di" (i), "2" (arch_atomic_read(v))); \ return t; \ } @@ -63,7 +63,7 @@ static inline int arch_atomic_fetch_##op(int i, atomic_t *v) \ " casl %2,%1,%0\n" \ " jne 1b" \ : "+m" (*v), "=&d" (t), "=&d" (tmp) \ - : "g" (i), "2" (arch_atomic_read(v))); \ + : "di" (i), "2" (arch_atomic_read(v))); \ return tmp; \ } |