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authorLinus Torvalds <torvalds@linux-foundation.org>2009-06-17 09:13:52 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2009-06-17 09:13:52 -0700
commit9cb0fbf7f8cbbd16218a4fb5983ac55fbc031929 (patch)
treeb81191320a41034986802fe27b07b269b220f530 /arch/mips/alchemy/xxs1500/board_setup.c
parentMerge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs-2.6 (diff)
parentMIPS: Add hibernation support (diff)
downloadlinux-dev-9cb0fbf7f8cbbd16218a4fb5983ac55fbc031929.tar.xz
linux-dev-9cb0fbf7f8cbbd16218a4fb5983ac55fbc031929.zip
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (47 commits) MIPS: Add hibernation support MIPS: Move Cavium CP0 hwrena impl bits to cpu-feature-overrides.h MIPS: Allow CPU specific overriding of CP0 hwrena impl bits. MIPS: Kconfig Add SYS_SUPPORTS_HUGETLBFS and enable it for some systems. Hugetlbfs: Enable hugetlbfs for more systems in Kconfig. MIPS: TLB support for hugetlbfs. MIPS: Add hugetlbfs page defines. MIPS: Add support files for hugetlbfs. MIPS: Remove unused parameters from iPTE_LW. Staging: Add octeon-ethernet driver files. MIPS: Export erratum function needed by octeon-ethernet driver. MIPS: Cavium-Octeon: Add more chip specific feature tests. MIPS: Cavium-Octeon: Add more board type constants. MIPS: Export cvmx_sysinfo_get needed by octeon-ethernet driver. MIPS: Add named alloc functions to OCTEON boot monitor memory allocator. MIPS: Alchemy: devboards: Convert to gpio calls. MIPS: Alchemy: xxs1500: use linux gpio api. MIPS: Alchemy: MTX-1: Use linux gpio api. MIPS: Alchemy: Rewrite GPIO support. MIPS: Alchemy: Remove unused au1000_gpio.h header ...
Diffstat (limited to 'arch/mips/alchemy/xxs1500/board_setup.c')
-rw-r--r--arch/mips/alchemy/xxs1500/board_setup.c21
1 files changed, 12 insertions, 9 deletions
diff --git a/arch/mips/alchemy/xxs1500/board_setup.c b/arch/mips/alchemy/xxs1500/board_setup.c
index a2634fabc50d..4de2d48caed8 100644
--- a/arch/mips/alchemy/xxs1500/board_setup.c
+++ b/arch/mips/alchemy/xxs1500/board_setup.c
@@ -23,6 +23,7 @@
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
+#include <linux/gpio.h>
#include <linux/init.h>
#include <linux/delay.h>
@@ -50,6 +51,9 @@ void __init board_setup(void)
}
#endif
+ alchemy_gpio1_input_enable();
+ alchemy_gpio2_enable();
+
/* Set multiple use pins (UART3/GPIO) to UART (it's used as UART too) */
pin_func = au_readl(SYS_PINFUNC) & ~SYS_PF_UR3;
pin_func |= SYS_PF_UR3;
@@ -65,20 +69,19 @@ void __init board_setup(void)
au_writel(0x01, UART3_ADDR + UART_MCR); /* UART_MCR_DTR is 0x01??? */
#ifdef CONFIG_PCMCIA_XXS1500
- /* Setup PCMCIA signals */
- au_writel(0, SYS_PININPUTEN);
-
/* GPIO 0, 1, and 4 are inputs */
- au_writel(1 | (1 << 1) | (1 << 4), SYS_TRIOUTCLR);
+ alchemy_gpio_direction_input(0);
+ alchemy_gpio_direction_input(1);
+ alchemy_gpio_direction_input(4);
- /* Enable GPIO2 if not already enabled */
- au_writel(1, GPIO2_ENABLE);
/* GPIO2 208/9/10/11 are inputs */
- au_writel((1 << 8) | (1 << 9) | (1 << 10) | (1 << 11), GPIO2_DIR);
+ alchemy_gpio_direction_input(208);
+ alchemy_gpio_direction_input(209);
+ alchemy_gpio_direction_input(210);
+ alchemy_gpio_direction_input(211);
/* Turn off power */
- au_writel((au_readl(GPIO2_PINSTATE) & ~(1 << 14)) | (1 << 30),
- GPIO2_OUTPUT);
+ alchemy_gpio_direction_output(214, 0);
#endif
#ifdef CONFIG_PCI