diff options
| author |   Thiemo Seufer <ths@networkno.de> | 2007-03-19 00:13:37 +0000 |
|---|---|---|
| committer |   Ralf Baechle <ralf@linux-mips.org> | 2007-03-19 20:22:43 +0000 |
| commit | 119537c092638bf8a0672415024639353c773bb1 (patch) | |
| tree | af3fc85f2d5a4bf93fd1cd82b228054ac6b5fe42 /arch/mips/gt64120 | |
| parent | [MIPS] Qemu: Fix Symmetric Uniprocessor support. (diff) | |
| download | linux-dev-119537c092638bf8a0672415024639353c773bb1.tar.xz linux-dev-119537c092638bf8a0672415024639353c773bb1.zip | |
[MIPS] Misc fixes for plat_irq_dispatch functions
o adds missing ST0_IM masks, which caused the logging of valid interrupts
as spurious
o stops pnx8550 to log every interrupt as spurious
o adds cause register masks for ip22/ip32, which caused handling of masked
interrupts
o removes some superfluous parentheses in the SNI interrupt code
Signed-Off-By: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/gt64120')
| -rw-r--r-- | arch/mips/gt64120/ev64120/irq.c | 2 | ||||
| -rw-r--r-- | arch/mips/gt64120/wrppmc/irq.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/arch/mips/gt64120/ev64120/irq.c b/arch/mips/gt64120/ev64120/irq.c index 04572b9c9642..64e4c80b6139 100644 --- a/arch/mips/gt64120/ev64120/irq.c +++ b/arch/mips/gt64120/ev64120/irq.c @@ -48,7 +48,7 @@ asmlinkage void plat_irq_dispatch(void) { - unsigned int pending = read_c0_status() & read_c0_cause(); + unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM; if (pending & STATUSF_IP4) /* int2 hardware line (timer) */ do_IRQ(4); diff --git a/arch/mips/gt64120/wrppmc/irq.c b/arch/mips/gt64120/wrppmc/irq.c index d3d96591780e..06177bf5b1d6 100644 --- a/arch/mips/gt64120/wrppmc/irq.c +++ b/arch/mips/gt64120/wrppmc/irq.c @@ -32,7 +32,7 @@ asmlinkage void plat_irq_dispatch(void) { - unsigned int pending = read_c0_status() & read_c0_cause(); + unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM; if (pending & STATUSF_IP7) do_IRQ(WRPPMC_MIPS_TIMER_IRQ); /* CPU Compare/Count internal timer */ |