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| author |   Huang Pei <huangpei@loongson.cn> | 2021-12-15 16:45:00 +0800 |
|---|---|---|
| committer |   Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2022-01-05 11:16:35 +0100 |
| commit | f0b7ddbd794bdffade370f22bb7a774002208ef4 (patch) | |
| tree | b704833d6caac2e9054d4b5be36d24a0e0c859a5 /arch/mips/include/asm/bitops.h | |
| parent | MIPS: rework local_t operation on MIPS64 (diff) | |
| download | linux-dev-f0b7ddbd794bdffade370f22bb7a774002208ef4.tar.xz linux-dev-f0b7ddbd794bdffade370f22bb7a774002208ef4.zip | |
MIPS: retire "asm/llsc.h"
all that "asm/llsc.h" does is just to help inline asm, which can be
stringifyed from "asm/asm.h"
+. Since "asm/asm.h" has all we need, retire "asm/llsc.h"
+. remove unused header file
Inspired-by: Maciej W. Rozycki <macro@orcam.me.uk>
Signed-off-by: Huang Pei <huangpei@loongson.cn>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'arch/mips/include/asm/bitops.h')
| -rw-r--r-- | arch/mips/include/asm/bitops.h | 24 |
1 files changed, 11 insertions, 13 deletions
diff --git a/arch/mips/include/asm/bitops.h b/arch/mips/include/asm/bitops.h index dc2a6234dd3c..3812082b8295 100644 --- a/arch/mips/include/asm/bitops.h +++ b/arch/mips/include/asm/bitops.h @@ -16,14 +16,12 @@ #include <linux/bits.h> #include <linux/compiler.h> #include <linux/types.h> +#include <asm/asm.h> #include <asm/barrier.h> #include <asm/byteorder.h> /* sigh ... */ #include <asm/compiler.h> #include <asm/cpu-features.h> -#include <asm/isa-rev.h> -#include <asm/llsc.h> #include <asm/sgidefs.h> -#include <asm/war.h> #define __bit_op(mem, insn, inputs...) do { \ unsigned long __temp; \ @@ -32,10 +30,10 @@ " .set push \n" \ " .set " MIPS_ISA_LEVEL " \n" \ " " __SYNC(full, loongson3_war) " \n" \ - "1: " __LL "%0, %1 \n" \ + "1: " __stringify(LONG_LL) " %0, %1 \n" \ " " insn " \n" \ - " " __SC "%0, %1 \n" \ - " " __SC_BEQZ "%0, 1b \n" \ + " " __stringify(LONG_SC) " %0, %1 \n" \ + " " __stringify(SC_BEQZ) " %0, 1b \n" \ " .set pop \n" \ : "=&r"(__temp), "+" GCC_OFF_SMALL_ASM()(mem) \ : inputs \ @@ -49,10 +47,10 @@ " .set push \n" \ " .set " MIPS_ISA_LEVEL " \n" \ " " __SYNC(full, loongson3_war) " \n" \ - "1: " __LL ll_dst ", %2 \n" \ + "1: " __stringify(LONG_LL) " " ll_dst ", %2\n" \ " " insn " \n" \ - " " __SC "%1, %2 \n" \ - " " __SC_BEQZ "%1, 1b \n" \ + " " __stringify(LONG_SC) " %1, %2 \n" \ + " " __stringify(SC_BEQZ) " %1, 1b \n" \ " .set pop \n" \ : "=&r"(__orig), "=&r"(__temp), \ "+" GCC_OFF_SMALL_ASM()(mem) \ @@ -98,7 +96,7 @@ static inline void set_bit(unsigned long nr, volatile unsigned long *addr) } if ((MIPS_ISA_REV >= 2) && __builtin_constant_p(bit) && (bit >= 16)) { - __bit_op(*m, __INS "%0, %3, %2, 1", "i"(bit), "r"(~0)); + __bit_op(*m, __stringify(LONG_INS) " %0, %3, %2, 1", "i"(bit), "r"(~0)); return; } @@ -126,7 +124,7 @@ static inline void clear_bit(unsigned long nr, volatile unsigned long *addr) } if ((MIPS_ISA_REV >= 2) && __builtin_constant_p(bit)) { - __bit_op(*m, __INS "%0, $0, %2, 1", "i"(bit)); + __bit_op(*m, __stringify(LONG_INS) " %0, $0, %2, 1", "i"(bit)); return; } @@ -234,8 +232,8 @@ static inline int test_and_clear_bit(unsigned long nr, res = __mips_test_and_clear_bit(nr, addr); } else if ((MIPS_ISA_REV >= 2) && __builtin_constant_p(nr)) { res = __test_bit_op(*m, "%1", - __EXT "%0, %1, %3, 1;" - __INS "%1, $0, %3, 1", + __stringify(LONG_EXT) " %0, %1, %3, 1;" + __stringify(LONG_INS) " %1, $0, %3, 1", "i"(bit)); } else { orig = __test_bit_op(*m, "%0", |