aboutsummaryrefslogtreecommitdiffstats
path: root/arch/mips/include/asm/cpu-features.h
diff options
context:
space:
mode:
authorMaciej W. Rozycki <macro@imgtec.com>2017-05-23 13:37:05 +0100
committerRalf Baechle <ralf@linux-mips.org>2017-07-05 14:06:44 +0200
commit8d1630f13754f1435d3ea7078829121c52f38d15 (patch)
tree0d5b43fa9aa8c2f284a887110e0d2365030c3db7 /arch/mips/include/asm/cpu-features.h
parentMIPS: VDSO: Fix a mismatch between comment and preprocessor constant (diff)
downloadlinux-dev-8d1630f13754f1435d3ea7078829121c52f38d15.tar.xz
linux-dev-8d1630f13754f1435d3ea7078829121c52f38d15.zip
MIPS: MIPS16e2: Identify ASE presence
Identify the presence of the MIPS16e2 ASE as per the architecture specification[1], by checking for CP0 Config5.CA2 bit being 1[2]. References: [1] "MIPS32 Architecture for Programmers: MIPS16e2 Application-Specific Extension Technical Reference Manual", Imagination Technologies Ltd., Document Number: MD01172, Revision 01.00, April 26, 2016, Section 1.2 "Software Detection of the ASE", p. 5 [2] "MIPS32 interAptiv Multiprocessing System Software User's Manual", Imagination Technologies Ltd., Document Number: MD00904, Revision 02.01, June 15, 2016, Section 2.2.1.6 "Device Configuration 5 -- Config5 (CP0 Register 16, Select 5)", pp. 71-72 Signed-off-by: Maciej W. Rozycki <macro@imgtec.com> Reviewed-by: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/16094/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/cpu-features.h')
-rw-r--r--arch/mips/include/asm/cpu-features.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h
index d6ea8e7c5107..8baa9033b181 100644
--- a/arch/mips/include/asm/cpu-features.h
+++ b/arch/mips/include/asm/cpu-features.h
@@ -138,6 +138,9 @@
#ifndef cpu_has_mips16
#define cpu_has_mips16 (cpu_data[0].ases & MIPS_ASE_MIPS16)
#endif
+#ifndef cpu_has_mips16e2
+#define cpu_has_mips16e2 (cpu_data[0].ases & MIPS_ASE_MIPS16E2)
+#endif
#ifndef cpu_has_mdmx
#define cpu_has_mdmx (cpu_data[0].ases & MIPS_ASE_MDMX)
#endif