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| author |   David Daney <ddaney@caviumnetworks.com> | 2009-07-13 11:15:19 -0700 |
|---|---|---|
| committer |   Ralf Baechle <ralf@linux-mips.org> | 2009-09-17 20:07:50 +0200 |
| commit | b791d1193af9772040e592d5aa161790f800b762 (patch) | |
| tree | 6adad3d9cdf278a3a1a3418ae75a2864d0cc7f39 /arch/mips/include/asm/cpu-features.h | |
| parent | MIPS: Get rid of CONFIG_CPU_HAS_LLSC (diff) | |
| download | linux-dev-b791d1193af9772040e592d5aa161790f800b762.tar.xz linux-dev-b791d1193af9772040e592d5aa161790f800b762.zip | |
MIPS: Allow kernel use of LL/SC to be separate from the presence of LL/SC.
On some CPUs, it is more efficient to disable and enable interrupts in the
kernel rather than use ll/sc for atomic operations. But if we were to set
cpu_has_llsc to false, we would break the userspace futex interface (in
asm/futex.h).
We separate the two concepts, with a new predicate kernel_uses_llsc, that
lets us disable the kernel's use of ll/sc while still allowing the futex
code to use it.
Also there were a couple of cases in bitops.h where we were using ll/sc
unconditionally even if cpu_has_llsc were false.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/cpu-features.h')
| -rw-r--r-- | arch/mips/include/asm/cpu-features.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h index 8ab1d12ba7f4..1f4df647c384 100644 --- a/arch/mips/include/asm/cpu-features.h +++ b/arch/mips/include/asm/cpu-features.h @@ -80,6 +80,9 @@ #ifndef cpu_has_llsc #define cpu_has_llsc (cpu_data[0].options & MIPS_CPU_LLSC) #endif +#ifndef kernel_uses_llsc +#define kernel_uses_llsc cpu_has_llsc +#endif #ifndef cpu_has_mips16 #define cpu_has_mips16 (cpu_data[0].ases & MIPS_ASE_MIPS16) #endif |