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| author |   Dmitry Torokhov <dmitry.torokhov@gmail.com> | 2019-07-10 23:24:10 -0700 |
|---|---|---|
| committer | Dmitry Torokhov <dmitry.torokhov@gmail.com> | 2019-07-10 23:24:10 -0700 |
| commit | 597473720f4dc69749542bfcfed4a927a43d935e (patch) | |
| tree | 711bf773910fb93d1dd9120c633adc807685e0d8 /arch/mips/include/asm/io.h | |
| parent | Input: atmel_mxt_ts - fix leak in mxt_update_cfg() (diff) | |
| parent | Input: gpio_keys_polled - allow specifying name of input device (diff) | |
| download | linux-dev-597473720f4dc69749542bfcfed4a927a43d935e.tar.xz linux-dev-597473720f4dc69749542bfcfed4a927a43d935e.zip | |
Merge branch 'next' into for-linus
Prepare input updates for 5.3 merge window.
Diffstat (limited to 'arch/mips/include/asm/io.h')
| -rw-r--r-- | arch/mips/include/asm/io.h | 22 |
1 files changed, 18 insertions, 4 deletions
diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h index 266257d56fb6..845fbbc7a2e3 100644 --- a/arch/mips/include/asm/io.h +++ b/arch/mips/include/asm/io.h @@ -218,6 +218,18 @@ static inline void __iomem * __ioremap_mode(phys_addr_t offset, unsigned long si } /* + * ioremap_prot - map bus memory into CPU space + * @offset: bus address of the memory + * @size: size of the resource to map + + * ioremap_prot gives the caller control over cache coherency attributes (CCA) + */ +static inline void __iomem *ioremap_prot(phys_addr_t offset, + unsigned long size, unsigned long prot_val) { + return __ioremap_mode(offset, size, prot_val & _CACHE_MASK); +} + +/* * ioremap - map bus memory into CPU space * @offset: bus address of the memory * @size: size of the resource to map @@ -342,13 +354,14 @@ static inline void pfx##write##bwlq(type val, \ if (irq) \ local_irq_save(__flags); \ __asm__ __volatile__( \ - ".set arch=r4000" "\t\t# __writeq""\n\t" \ + ".set push" "\t\t# __writeq""\n\t" \ + ".set arch=r4000" "\n\t" \ "dsll32 %L0, %L0, 0" "\n\t" \ "dsrl32 %L0, %L0, 0" "\n\t" \ "dsll32 %M0, %M0, 0" "\n\t" \ "or %L0, %L0, %M0" "\n\t" \ "sd %L0, %2" "\n\t" \ - ".set mips0" "\n" \ + ".set pop" "\n" \ : "=r" (__tmp) \ : "0" (__val), "m" (*__mem)); \ if (irq) \ @@ -375,11 +388,12 @@ static inline type pfx##read##bwlq(const volatile void __iomem *mem) \ if (irq) \ local_irq_save(__flags); \ __asm__ __volatile__( \ - ".set arch=r4000" "\t\t# __readq" "\n\t" \ + ".set push" "\t\t# __readq" "\n\t" \ + ".set arch=r4000" "\n\t" \ "ld %L0, %1" "\n\t" \ "dsra32 %M0, %L0, 0" "\n\t" \ "sll %L0, %L0, 0" "\n\t" \ - ".set mips0" "\n" \ + ".set pop" "\n" \ : "=r" (__val) \ : "m" (*__mem)); \ if (irq) \ |