diff options
| author |   Ralf Baechle <ralf@linux-mips.org> | 2013-01-22 12:59:30 +0100 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2013-02-01 10:00:22 +0100 |
| commit | 7034228792cc561e79ff8600f02884bd4c80e287 (patch) | |
| tree | 89b77af37d087d9de236fc5d21f60bf552d0a2c6 /arch/mips/include/asm/irq.h | |
| parent | MIPS: Nuke empty lines at end of files. (diff) | |
| download | linux-dev-7034228792cc561e79ff8600f02884bd4c80e287.tar.xz linux-dev-7034228792cc561e79ff8600f02884bd4c80e287.zip | |
MIPS: Whitespace cleanup.
Having received another series of whitespace patches I decided to do this
once and for all rather than dealing with this kind of patches trickling
in forever.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/irq.h')
| -rw-r--r-- | arch/mips/include/asm/irq.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/mips/include/asm/irq.h b/arch/mips/include/asm/irq.h index 78dbb8a86da2..7bc2cdb35057 100644 --- a/arch/mips/include/asm/irq.h +++ b/arch/mips/include/asm/irq.h @@ -32,7 +32,7 @@ struct irqaction; extern unsigned long irq_hwmask[]; extern int setup_irq_smtc(unsigned int irq, struct irqaction * new, - unsigned long hwmask); + unsigned long hwmask); static inline void smtc_im_ack_irq(unsigned int irq) { @@ -60,7 +60,7 @@ extern void smtc_forward_irq(struct irq_data *d); * if option is enabled. * * Up through Linux 2.6.22 (at least) cpumask operations are very - * inefficient on MIPS. Initial prototypes of SMTC IRQ affinity + * inefficient on MIPS. Initial prototypes of SMTC IRQ affinity * used a "fast path" per-IRQ-descriptor cache of affinity information * to reduce latency. As there is a project afoot to optimize the * cpumask implementations, this version is optimistically assuming @@ -133,7 +133,7 @@ extern void free_irqno(unsigned int irq); /* * Before R2 the timer and performance counter interrupts were both fixed to - * IE7. Since R2 their number has to be read from the c0_intctl register. + * IE7. Since R2 their number has to be read from the c0_intctl register. */ #define CP0_LEGACY_COMPARE_IRQ 7 #define CP0_LEGACY_PERFCNT_IRQ 7 |