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| author |   Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2020-08-24 18:32:49 +0200 |
|---|---|---|
| committer | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2020-09-07 22:24:27 +0200 |
| commit | 256ec489f1c7726f0db9ffee88ba7cdc317806cd (patch) | |
| tree | c144af757fa94627e5c0cd765da9e31d02af5f8a /arch/mips/include/asm/mach-ip27/war.h | |
| parent | MIPS: Convert ICACHE_REFILLS_WORKAROUND_WAR into a config option (diff) | |
| download | linux-dev-256ec489f1c7726f0db9ffee88ba7cdc317806cd.tar.xz linux-dev-256ec489f1c7726f0db9ffee88ba7cdc317806cd.zip | |
MIPS: Convert R10000_LLSC_WAR info a config option
Use a new config option to enabel R1000_LLSC workaound and remove
define from different war.h files.
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'arch/mips/include/asm/mach-ip27/war.h')
| -rw-r--r-- | arch/mips/include/asm/mach-ip27/war.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/mips/include/asm/mach-ip27/war.h b/arch/mips/include/asm/mach-ip27/war.h index d8dfa7258bea..0a07cf6731c0 100644 --- a/arch/mips/include/asm/mach-ip27/war.h +++ b/arch/mips/include/asm/mach-ip27/war.h @@ -10,7 +10,6 @@ #define BCM1250_M3_WAR 0 #define SIBYTE_1956_WAR 0 -#define R10000_LLSC_WAR 1 #define MIPS34K_MISSED_ITLB_WAR 0 #endif /* __ASM_MIPS_MACH_IP27_WAR_H */ |